Logic level

Denote logic level in digital technology, the electrical voltages usually used to represent the logic values ​​. However, they may also be other physical variables act ( pressure level in pneumatics, luminous flux at the Optoelectronics ).

In digital, usually binary coded signals, a voltage range are permitted, the high level ( also H level, high, H) or low level ( L-level, low, L) can be mentioned.

• 2.1 high- active and low-active
• 2.2 Positive and negative logic

Level

In digital technology, information is presented using electrical voltages. In general, the information is encoded in binary and thus two voltage levels are necessary to represent the logic levels: the high level, the higher voltage, usually almost corresponds to the operation voltage; the low level than lower voltage is usually close to 0 volts (ground reference, short GND of Engl. ground). The exact level will vary depending on the type of used blocks.

To represent the two logic values ​​relatively large level areas may serve as real logic circuits can reliably detect the states despite tolerances and assign. The area between two input level ranges of a logic gate, ie between VIL and VIH is not permitted ( Prohibited area), the signal voltage is not there unique to a logic value ( red in the diagram). Therefore, a minimum output voltage VOH is the output side and input side demanded a guaranteed minimum input voltage VIH for high level. VOH is the output voltage is always greater than the input voltage VIH, the difference between VOH - VIH is called static signal to noise ratio and ensures the reliability of the circuits. At low level, there is accordingly a maximum output voltage VOL, the maximum input voltage VIL and the static noise margin VIL - VOL.

Several factors can cause the reserve of the two allowed regions is exploited to approach the forbidden area. Thus, the output voltage of a gate is for example dependent on the load current and the number of the connected gate inputs. Inductive and capacitive properties of the compounds as well as external sources of interference (eg by capacitive coupling ) distort the signal and the components used have production-related and temperature-dependent tolerances. Dispersion in cables and optical fibers can lead to flattened signals.

The change between the two logic levels must be done with a minimum slope, the phase of the change is called signal edge (shown in blue in the chart). The switching flanks are not short enough, or is a continuously varying ( analog ) signals are converted to digital, a Schmitt trigger can be utilized.

Defaults

Assignment to logic types

High- active and low-active

In particular, signals that indicate their level with a condition (no binary digit represent ) are called low-active (active low ) or high-active ( active high ), depending on whether a low-or high - level presence the state designated. The latter is rarely used, since this is the normal state in the absence of designation. In principle, negative logic and low-active or positive logic and high active match.

Designations low- active signals are usually provided with a sweep. Alternatively asterisks or slashes are forward or back burner. The spellings BSP, BSP * and / BSP, all indicate that the signal is active low GNP.

This marking as active low or active-high depends on the wording, it would, for example, the designation of a control input with / ena ( enable = of activation when low) equivalent to the name of dis ( inactive from disable = if high).

Positive and negative logic

In the so-called positive logic of the high- level encoding of the binary value 1 and the low level, the binary value 0 in the negative logic, is the high level and the low level 0 1 dar.

Some applications use a negative logic. This is, for example, in the V.24 and RS -232 interface in such a way as the complete handshake with the IEC 625 interface, designed as a negative logic.

Positive and negative logic are only a notation in digital technology. If a signal is held in positive logic reinterpreted in negative logic (or vice versa), this corresponds to a negation of all the affected inputs and outputs. For example, if an AND gate for positive logic, with inputs A, B and Y, and the output of the function

Is used in an environment with negative logic, obtained by negation of A, B and Y and subsequent transformation with the laws of De Morgan

An AND gate for positive logic thus acts as an OR gate for negative logic. ( See also: Wired- AND, wired-OR )