PA-RISC

Parallel / Precision Architecture Reduced Instruction Set Computer ( PA-RISC) is a microprocessor architecture from Hewlett -Packard for use in the server and workstation area. As is evident from the name, is a processor of RISC design, the PA is short for Precision Architecture. He is also known under the name HP / PA for Hewlett Packard Precision Architecture.

In the late 1980s, HP produced four model series of computers, all working with various CISC processors. Introduced in 1986 PC-compatible HP Vectra series based on Intel 80286 processors. All other model series used CPUs from other manufacturers. The HP 200 Series - (1981) and HP 9000 Series 300 - (1985 ) Unix ( HP -UX) workstations based on the Motorola 68k style. An additional 68k -based series came in 1989 added through the acquisition of Apollo, the subsequent HP Apollo 9000 Series 400 The next stand-alone series was the Series 300 HP (1978), built-in multi -user computer based on a proprietary silicon-on - Sapphire ( SoS ) - CPU design and operating system Amigo/300 based. The first series of the Hewlett -Packard 3000 series (1972 ) were also based on a SoS design and MPE ( operating system). Finally, there was the HP 9000 Series 500 (1982 ) minicomputer, which used the HP-developed even 32 -bit FOCUS CPU. All non- Intel-based HP systems were consolidated in 1988 using the new PA - RISC processor on a single design.

The first series of PA - RISC 7000 processors were designed for an address space of 32 bits and were first used in March 1986 in HP -3000 series with the models 930 and 950 and in the 930 identical HP 9000 840S.

A feature of the PA - RISC series is that most generations of these CPUs do not have a Level 2 cache. Instead large level-1 caches are used, initially linked as separate chips on a bus, subsequently integrated on a chip. Only 7100LC PA, PA -7200 and PA- 7300LC had an L2 cache. Another innovation of the PA -RISC designs were the additional, so-called multimedia instructions ( SIMD ), which were first introduced with the PA - 7100LC. From the PA -7200 and the external MMC / SMC Memory Controller (otherwise, a maximum of 32 GB of main memory for K420 max 8 GB. ) On the 32- bit versions of was used, it allows for the first time a 36 - bit address space, HP- UX release 11.00 from can access "Memory Windows " (compare PAE or AWE).

In 1994, the still valid PA - RISC 2.0 specification has been defined, which provides a word width of 64 bits and thus allows a linear address space that is larger than 4 GB. Other changes related to the pipeline architecture, and the division of the instruction cache in two units, one for commands that are processed rapidly, one for those which are time-consuming. The first representative of the new standards was the PA - 8000.

Production of PA - RISC processors should end in 2004 originally, but it was extended because of various delays in the Itanium development. The production of new systems based on the HP -PA processor architecture, ended December 31, 2008. As the successor since the late 1990s, developed by HP with Intel IA -64 architecture (Itanium ) is used.

The PA-RISC processors are also supported by NetBSD, OpenBSD, or Linux. Since the release of Debian 3.0 (woody) HPPA is an officially supported Debian architecture, the current stable distribution of Debian HPPA GNU / Linux is version 6.0. It was released on February 6, 2011. Gentoo Linux also supports HPPA. An Ubuntu - porting also existed until the Release 9:04 ( " Jaunty "). From the Release 9:10 there will be no more Ubuntu support for the PA - RISC processors more. Generally, it is the HPPA ports become quiet.

Model History

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