Serial Vector Format

The Serial Vector Format (short: SVF ) is a file format for the exchange of boundary scan test vectors. It was established in 1991 jointly by Texas Instruments and Teradyne developed with the aim of a manufacturer- independent description of JTAG operations. Today it is maintained by the company ASSET InterTech. The Serial Vector Format is common in addition to the use in ATE systems as a programming file for programmable logic circuits, and microcontrollers.

Construction

SVF files contain a sequence of SVF instructions that describe how the JTAG state machine to be run. The two main commands are the Shift instructions SIR (Scan Instruction Register) and SDR (Scan Data Register ). SIR performs a shift operation in the Instruction Register, SDR a shift operation in the currently active data register by, each with a specified number of bits. As a parameter value can be specified, which is pushed into the register and an expected output value. The two parameters can also be assigned to a bit mask that specifies which of the bits shifted to be evaluated. These parameters are specified in hexadecimal. For the case that in a JTAG chain more than one component is included, a header and a trailer can be set, which receive the additional bits into the shift operations that are needed to traverse the other components. Command RunTest holds the JTAG state machine for a certain time or a predetermined number of TCK clock edges in Runtest / Idle state. This statement can be realized, for example, required for programming algorithms waits.

SVF is an ASCII format so that it can be read and modified easily. A line may be up to 256 characters long, but a statement can span multiple lines. Each statement must be terminated with a semicolon. Comments can be personalized with a leading exclamation mark '!' or two forward slashes '/ / ' insertion.

Example

/ / Test bus reset, Instruction and data register scans in the IDLE state finish. TRST ON; TRST OFF; ENDIR IDLE; ENDDR IDLE; / / Specify the maximum allowed TCK frequency, here 1 MHz. FREQUENCY 1E6 HZ; / / Header and trailer to 0 ( there are no other blocks in the JTAG chain ). HIR 0; HDR 0; TIR 0; TDR 0; / / Load an eight - bit wide instruction register with 0x42. SIR 8 TDI (42); / / Wait 10 TCK RunTest 10 TCK; / / Read a 32- bit wide data register, the value 0x1234567 is expected. SDR 32 TDI ( 00000000 ) Smask ( ffffffff ) TDO ( f1234567 ) MASK ( 0fffffff ); / / Instruction ' bypass ' Load. SIR 8 TDI (ff); / / End variants

A variant is the company Xilinx XSVF the format. In contrast to the SVF XSVF is not ASCII but a binary file, it represents a sort of compressed form an SVF file dar. by the binary representation to achieve smaller file sizes.

A similar the SVF file format is developed by Altera and since August 1999 by the JEDEC JESD71 as specified Standard Test and Programming Language ( STAPL ).

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