Advanced Boolean Expression Language

The Advanced Boolean Equation Language ( abbreviated ABEL ) is a now hardly used hardware description language that was used in the digital technology of the 1980s and 1990s, to simple logic circuits for devices such as CPLDs ( Complex Programmable Logic Devices) and for smaller FPGAs ( Field Programmable gate Array) design. The description is basically with Boolean equations and truth tables. While Verilog and VHDL were originally designed for circuit simulation, the focus was on the design of ABEL on the automatic and very hardware-oriented generation of programming files for CPLDs.

ABEL was developed in the 80s by the "Data I / O Corporation " in Redmond ( Washington). After a series of sales ABEL been maintained since 1999 by Xilinx. Today ABEL is very little used, since more abstract descriptions can be automatically implemented for example in VHDL gate in lists by the advent of powerful synthesis tools. For circuits, which consist of several hundreds of thousands logic gates manual description with logic equations as in ABEL is not practical. But even with smaller circuits ABEL is hardly applicable since the entire functionality can be covered with usual today hardware languages ​​such as VHDL or Verilog.

Example, traffic light control ABEL - HDL in

The following code shows a program for simple traffic light circuit is that the traffic signals red - red / yellow - green - yellow - red - and so goes through as long as a high signal is applied to the enable input.

MODULE traffic light     TITLE ' traffic light '     DECLARATIONS     / / Inputs         clk pin 11; / / Clock signal         en pin 9; / / Enable signal to start the traffic light     / / Nodes         q0 node istype ' reg ';         q1 node istype ' reg ';     / / Output         red pin 36 istype ' com'; / / The red light         yellow pin 42 istype ' com'; / / The yellow light         green pin 39 istype ' com'; / / The green light     EQUATIONS         q0: = q0 & s; !         q1: = (q1 q0 $ ) & s; !         q0.clk = clk;         q1.clk = clk;         red = q1;         yellow = q0! ;         green = ( q1 & q0! )! ;     TEST_VECTORS                ( [ clk, en] -> [red, yellow, green] );     @ repeat { 1 [C., 1. ] -> [ X, X, X... . ] ;}     @ repeat { 7 -> [ C, 0. ] [ X, X, X... . ] ;}     @ repeat { 3 [C., 1. ] -> [ X, X, X... . ] ;}     @ repeat { 40 [C., 0. ] -> [ X, X, X... . ] ;}     END Web Links

• University of Pennsylvania 's ABEL primer ( English )