Advanced Programmable Interrupt Controller
APIC is in contrast to the PIC from two components, the
- Local APIC, usually part of the CPU, and the
- I / O APIC in the chipset.
The CPU families Pentium, Pentium Pro, Pentium II, Pentium III ( generation P5 and P6 ) is an additional to the APIC bus system connecting the individual to each other APICs. Since the Pentium 4 ( NetBurst and Core generation ) messages between the APICs via the normal platform-specific system bus to be replaced.
Simplifies the system works is that the I / O APIC accepts the interrupt requests from the devices in the system, and they distributed as interrupt messages to the Local APICs in the processors of the system. The Local APICs lead in turn to each of the highest priority interrupt to the CPU core on. Is this processed, forwarded to the local APIC interrupt on the next.
The APIC system was originally developed by Intel to enable the interrupt distribution in multiprocessor systems, which was not feasible with the existing XT -PIC. Meanwhile, use more and more single-processor systems, the APIC system because it eliminates other problems of the XT -PIC:
- More inputs for interrupt lines reduce the likelihood that several devices have to share an interrupt
- More flexibility: each interrupt can be configured separately
- Priorities of the interrupts can be almost arbitrarily defined
- Message - Signaled Interrupts are supported
- Processors can send each other interrupts ( Inter Processor Interrupts )
- Faster programming, especially the Local APICs
APIC is now supported by all modern operating systems, but is also responsible for a number of errors, since the implementations are partially incorrect.