ARM Cortex-M
ARM Cortex- M is a family of 32 -bit microprocessors, which was developed by the company ARM and is produced under license from various hardware manufacturers. The core is a reduced instruction set computer (RISC ) that is part of the ARMv6 architecture and is divided in ascending complexity in the units Cortex- M0, Cortex- M0 , Cortex- M1, Cortex- M3 and Cortex- M4. The primary area of application is microcontroller.
- 3.2.1 Special features
- 3.2.2 implementations
- 3.3.1 Special features
- 3.3.2 implementations
- 3.4.1 Special features
- 3.4.2 implementations
- 3.5.1 Special features
- 3.5.2 implementations
General
ARM Limited is not itself microprocessors ( CPUs) ago, but licensed the core of interested manufacturers and chip producers, so-called integrated device manufacturers (IDM ), which the actual ARM core to own and manufacturer-specific peripherals such as Controller Area Network (CAN ), Local Interconnect Network ( LIN), Universal Serial Bus (USB), I ² C- bus, expand Serial Peripheral Interface (SPI), serial interfaces, Ethernet interfaces, PWM outputs, or analog-to- digital converter. These units are connected via the Advanced Microcontroller Bus Architecture ( AMBA ) to the ARM core. ARM Limited provides the core for a variety of licensing models, which differ in cost and scope of the data provided. In all cases, the right is connected to be allowed to sell their own hardware with ARM processors free.
The " ARM Cortex- M " processors are available for the licensee as an IP core in the hardware description language Verilog and can be imaged by means of logic synthesis as digital hardware circuit, and then either in Field Programmable Gate Arrays (FPGAs) or Application Specific Integrated Circuits ( ASICs) to be used. Depending on the license model also extensions and changes are permitted and allow the hardware vendor besides the integration of peripheral extensions such as special clock shapes, optimized performance for mobile devices own machine instructions or the integration of special debug interface.
Instruction set
All processors in the Cortex- M family support the basic commands from the Thumb instruction set is called the Thumb-2 instruction set and offer an additional multiplier in hardware. M0 and M1, however, absent in the Thumb instruction set of newer extensions such as the commands CBZ, CBNZ and IT, which are available only in the later developed ARMv7 -M architecture. And the Thumb-2 instruction set is limited to a few commands such as BL, DMB, DSB, ISB, MRS and MSR. The restrictions at M0 and M1 are due to the requirement to keep the chip area as small as possible.
Cortex- M3, with a larger chip area, includes the full Thumb and Thumb-2 instruction set, that offers several special instructions, a separate division unit in hardware and can handle mathematical commands such as addition rather than with overflow with saturation, which especially in the area the signal processing is important. Cortex- M4 expands these possibilities to some special commands, which are common in digital signal processors ( DSP), and offers an optional floating point unit for the processing of floating-point numbers according to the IEEE 754 standard for single precision.
Most Cortex- M3 and -M4 chips provide bit - banding. This means that certain bits in memory mapped to a separate word address and thus can be addressed easily. It is not to be confused with bit - banging. Whether the function is actually present on a specific Cortex-M implementation, should be checked in each individual case.
Types
Cortex- M0
Special
Special features of the Cortex- M0 are:
- ARMv6 -M architecture
- Von Neumann architecture (unlike M3 and M4)
- Wake-up interrupt controller
- Interrupt vector table offset into RAM
- Instruction set Thumb - almost complete except for CBZ, CBNZ, IT.
- Thumb-2 - subset consisting of BL, DMB, DSB, ISB, MRS, MSR.
- 32-bit multiplier, for the synthesis with a selected cycle, which requires a higher chip area, or 32 cycles and less chip area.
Implementations
Among other things, the following semiconductor manufacturers Cortex- M0 based microcontrollers offer:
- Freescale Kinetis KL- family
- NXP LPC800 family
- Atmel SAM - D20 family
Cortex- M0
Special
Special features of the Cortex- M0:
- ARMv6 -M architecture
- Von Neumann architecture (unlike M3 and M4)
- Wake-up interrupt controller
- Instruction set Thumb - almost complete except for CBZ, CBNZ, IT.
- Thumb-2 - subset consisting of BL, DMB, DSB, ISB, MRS, MSR.
- 32-bit multiplier, for the synthesis with a selected cycle, which requires a higher chip area, or 32 cycles and less chip area.
Implementations
Among other things, the following semiconductor manufacturers Cortex- M0 based microcontrollers offer:
- Silicon Laboratories EFM32 Zero Gecko Family
- NXP LPC11xx and LPC12xx families
- Nuvoton NuMicro family
- STMicroelectronics STM32 F0 - family
- Infineon XMC1000 family
Cortex- M1
Special
Special features of the Cortex- M1 are:
- ARMv6 -M Architecture
- Instruction set Thumb - almost complete except for CBZ, CBNZ, IT.
- Thumb-2 - subset consisting of BL, DMB, DSB, ISB, MRS, MSR.
- 32-bit multiplier, for the synthesis with a selected cycle, which requires a higher chip area, or 32 cycles and less chip area.
Implementations
Among other things, the following semiconductor manufacturers offer of Field Programmable Gate Array ( FPGA) so-called soft cores for their logic modules to:
Cortex- M3
Special
Special features of the Cortex- M3 are:
- ARMv7 -M architecture
- Instruction set full Thumb instruction set
- Complete Thumb-2 instruction set
- 32-bit multiplication with a cycle of 2 to 12 cycles long division command, mathematical function unit with overflow or saturation property.
Implementations
Among other things, the following semiconductor manufacturers Cortex- M3 based microcontrollers offer:
- Actel SmartFusion family
- Atmel SAM3 family
- Cypress Semiconductor PSoC 5
- Silicon Laboratories Tiny Gecko, Gecko, Leopard Gecko and Giant Gecko families
- Fujitsu FM3 family
- NXP LPC13xx, LPC17xx, LPC18xx families
- STMicroelectronics STM32 F2, F1, L1 W Family
- Texas Instruments Stellaris, TMS470, and some processors in the OMAP4 family
- Toshiba TX03 series
Cortex- M4
Special
In the structure of the Cortex- M4 corresponds to an M3, which is extended by special DSP instructions and an optional floating point unit. Cortex- M4 with floating point unit is called Cortex- M4F. The Cortex- M4 features include:
- ARMv7 -ME Architecture
- Instruction set full Thumb instruction set
- Complete Thumb-2 instruction set
- 32-bit multiplication with a cycle of 2 to 12 cycles long division command mathematical function unit with overflow or saturation property.
- DSP extensions: 16/32-bit MAC instruction with a cycle 8/16-bit SIMD arithmetic.
- Optional floating point unit with the designation FPv4 -SP, IEEE -754 compatible.
Implementations
Among other things, the following semiconductor manufacturers Cortex- M4 based microcontrollers offer:
- Atmel: SAM4 family ( Cortex- M4)
- Silicon Laboratories Wonder Gecko Family
- Freescale: Kinetis family (Cortex -M4 and Cortex- M4F )
- STMicroelectronics: STM32 F4 family ( Cortex- M4F )
- Infineon: XMC4000 family ( Cortex- M4F )
- Texas Instruments Stellaris LM4F and Tiva - TM4C family ( Cortex- M4F )
- NXP LPC4300 family ( Cortex- M4)
Development Tools
As an integrated development environments, among others, the GNU toolchain with Eclipse is available. There are also several commercial offers, for example, IAR or Keil. The operating system can include real- time operating systems such as FreeRTOS, OpenRTOS or SafeRTOS apply. On processors with external memory interface, it is also possible to perform μClinux. As a debugger for the JTAG interface include the GNU debugger in conjunction with OpenOCD for the hardware connection available.
The documentation is very extensive. In particular, the core functions of the Cortex- M family are described in the documentation of ARM and identical for all implementations. The various specific hardware implementations and vendor-specific extensions, however, are described in the manufacturer's documentation.
Pictures of ARM Cortex-M
