Dual-channel architecture

When Dual Channel the ability of current PC chipsets and memory controller is called to operate memory modules in parallel. For this purpose, separate buses from the memory controller to be used on individual modules. Parallel operation leads to a higher data transfer rate and an associated improvement in performance.

Distinction

Principle must be distinguished depending on the seat of the memory controller between two types or approaches:

In classical chipset architecture is the memory controller in the northbridge. This in turn is coupled via a front side bus to the CPU. When operating in dual-channel mode thus not the bandwidth between the processor and memory, but the bandwidth between North Bridge and memory is increased. The achievable performance gain due to the increased memory bandwidth is accordingly low ( see below). This technique is based in principle on memory interleaving.

Sits the memory controller directly in the main processor ( AMD, for example, since the introduction of the Athlon 64 ), the bit width of the memory bus ( data bus ) and thus also doubles the theoretically available memory bandwidth directly. In X86 processors thus the existing since the Intel Pentium, 64 bit wide data bus ( previously 32 bit at 80486 ) is increased to 128 bits. Thus the dual- channel capability depends, for example, the Athlon 64 from the CPU - more specifically from the base used - and not from the chipset of the motherboard. All AMD processors since the socket 939, therefore, support dual -channel operation. The respect to the base 754 extra pins provide the necessary second memory bus.

Conditions

For the operation, no special security modules are needed - only the memory controller must support this technology. The modules used are not necessarily identical. Dual Channel works with any type of memory, provided that the amount of memory in the memory channel 1 is as large as in the memory channel 2 For example, 512 - MB or 1- GB modules per channel, both individually with then a total of two modules, and doubly equipped with then four modules. Dual channel works with two different sized modules per channel, for example, 512 MB ​​and 1 GB per channel for a total of 3 GB then.

Stability and speed of dual channel can be improved, for example by:

  • Same organization of the memory chips. This can often, but not always, determined by the number of chips or the populated side of the DIMM. Different organization is a common reason for incompatibilities.
  • In the same operation speed of the two modules, otherwise limits the slowest module.
  • Same memory module manufacturer and the same model is often sold with additional charge as dual-channel package.

Since these conditions are met by many manufacturers, including modules from different manufacturers can be combined.

A special feature is used on some chipsets, such as nForce2 or SiS 655, they can also operate three modules in dual channel. The first two DIMM sockets may be combined with the third. The capacity of the modules must be identical, otherwise (ie, if the storage capacity of the third module of the first two above or below ) the remaining memory in single channel mode is operated. In current Intel chipsets, it also does not matter whether the capacity of the memory modules comply in both memory controller channels (see section dual channel Asymmetric ).

Performance

In contrast to the single-channel mode in which the data bus is 64 bits wide (ie, 64 data lines), be operated in dual-channel mode with two modules simultaneously, each with 64 bit data bus. Since the clock rate at which the memory runs remains the same, but the amount of data transferred per clock doubled (ie 128 bits per clock instead of the current 64 bit ), the use of dual-channel mode theoretically leads to double the memory throughput. Thus, PC2 -6400 memory can in single-channel mode about 6.4 gigabytes / s of data transfer to the memory controller, dual channel mode, there are approximately 12.8 gigabytes / s

By how much the operating speed increases through the use of dual channel depends on the used programs, the memory access patterns and the CPU (see cache and prefetching ). In the classic chipset architecture a performance increase to about 5 % compared to the single-channel operation can be expected. For Pentium 4 systems this side by the special front bus can (Quad Data Rate) also (theoretically ) higher. By optimizing the cache of the benefits CPUs today are hardly measurable.

For systems with internal CPU memory controllers ( Athlon 64, etc.), the practical performance increase is due to the "effective " doubling of the bandwidth in the range of up to 20%, in heavily dependent on the memory throughput applications (e.g., data compression ) and substantially more and synthetic memory benchmarks according to nearly 100 %. Systems with integrated graphics also benefit greatly because the CPU and the GPU have to share the memory bandwidth.

Dual Channel Asymmetric

The dual channel Asymmetric configuration is supported for example by the Intel 965 chipset. The difference compared to the " Dual Channel Symmetric mode " as he describes Intel is that the two memory channels are not working with the same storage capacity. In Dual - Channel Symmetric mode, accesses after the dual-channel method and are therefore faster. The number of modules is not important.

Equipped user channels with different capacities, the memory access takes place in the so -called " single channel mode " or in " Dual Channel Asymmetric Mode". In both modes, the memory access is based on the single-channel method, so that the memory performance is correspondingly low compared to the dual-channel symmetric mode.

In all modes of operation, the clock rate of the total memory is determined by the slowest operating frequency of a single storage module, which contains the SPD register in coded form. Is the motherboard equipped for example with a DDR2 -533 and DDR2 -400 memory module, the full system memory only works with DDR2 -400 timing.

Dual Channel Symmetric

Thus, the memory controller can work optimally with 128 -bit memory accesses, both channels should be equipped with the same storage capacity. Here are two examples:

  • ChB DIMM0 512 MB
  • DIMM1 000 MB ChB

Or

  • ChB DIMM0 512 MB
  • DIMM1 000 MB ChB

Single Channel

With this placement, the memory controller in the slow single-channel mode, there is only one bank is occupied in a memory channel:

  • ChB DIMM0 000 MB
  • DIMM1 000 MB ChB

Or

  • ChB DIMM0 000 MB
  • ChB DIMM1 512 MB

It is also possible to manually switch in dual-channel configuration in the BIOS in the single-channel mode, for example when in dual channel mode because of stability problems (which can happen, for example, when the corresponding memory configuration is not in is listed the Qualified Vendor List ( QVL) mainboard ).

Dual Channel Asymmetric

Although both memory channels are populated, would perform without Flex Memory Technology of the memory controller only slow single-channel access.

Located in the two channels memory modules with different total capacities such as 512 MB ​​and 256 MB, yet fast dual-channel memory accesses (128 bits) can be performed by the Flex - Mode technology. This is only possible in the shared memory address space of 256 MB. The remaining memory of 256 MB of 512 MB module continues to operate only in single- channel mode.

  • ChB DIMM0 000 MB
  • ChB DIMM1 256 MB

In the following example, half the memory of channel A (512 MB) in Single Mode works with 64 bits, and the remaining 512 MB ​​of channel A and channel B 512 MB ​​dual channel mode with 128 bit:

  • ChB DIMM0 000 MB
  • ChB DIMM1 512 MB
Computer memory Northbridge (computing) Socket 754 Silicon Integrated Systems Cache (computing) Benchmarking
249244
de