Erasable Programmable Logic Device

An Erasable Programmable Logic Device ( EPLD ) is already considered historically to be designated, erasable by UV - light programmable logic device, which is constructed in the floating - gate technology. Compared to PAL blocks is the number of gates that can be programmed much higher.

When programming the EPLD on the isolated floating gate charge is stored that can be erased with UV light again, since this radiation the charges removed. A charged floating gate represents an interruption represents a EPLD is composed of an AND gate input matrix, which can be programmed, and is from an Or - output matrix which already wired on the chip.

The EPLD there since about 1984. Today, they are rarely used and have been almost completely replaced by CPLDs or FPGAs.

  • Programmable Logic
  • An integrated circuit
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