Frequency Locked Loop

Frequency Locked Loop (FLL, . Eng " frequency locked loop ") is a method for stabilizing the output frequency in oscillators.

Principle of operation

Developed the Frequency Locked Loop in 1973 by Dutch radio amateur Klaas Spaargaren (call sign PA0KSB ). The frequency of a voltage controlled oscillator is compared by an array of logic gates with a reference oscillator. If the two differ, produces a " counting error ", which is formed through a gate to a variable width square-wave voltage and then integrated. The resulting voltage pulls the VCO to its nominal frequency, which remains constant as from a few Hz. The circuit is also called " Huff and Puff Oscillator".

The basic principle here is similar to a frequency counter. As basic frequency counters of the reference oscillator is assumed to reflect a gate time during which the oscillations of the VCO are counted. In contrast to the frequency counter, however not all of the count after the gate time is considered. Instead, the remainder of the count by (implicit ) divided by the desired frequency grid is considered. So, how far the VCO frequency is removed from the next multiple of the grid frequency. The larger this counting error, the stronger the VCO is controlled to adjust it toward the target frequency ( a multiple of the grid frequency).

The division of the count will not be explicitly executed but the selected gate time as a multiple of the desired screen frequency. Thus it is sufficient to consider whether the significant digits of the counter are different from zero.

Application

The advantage is that in a space-saving construction of many older transceivers can be retrofitted with a digital frequency stabilization. The disadvantage is that control oscillations depending on the structure are possible. In TTL concept, the control must be disabled manually before a change in frequency; microprocessors now be used instead of TTL ICs usually.

Various microcontrollers also have internal FLLs for their own purposes. These are from the microcontroller, for example, used to stabilize an internal fast but inaccurate RC clock generator by an external, inexpensive, accurate but slow 32 -kHz clock crystal. The RC clock generator then generates a clock that is sufficiently accurate to, for example, to comply with the time and conditions for various communication protocols, for a free-running RC clock generator would be too inaccurate.

Due to the similarity with a frequency counter, it is very easy to build a combined frequency counter / FLL - VCO, which not only controls the VCO, but also indicates the current frequency.