IA -64 ( Intel Architecture 64- bit) is a 64 -bit architecture and a EPIC instruction set, which jointly by Hewlett -Packard and Intel for the Itanium processor generations (Merced, Itanium 2, ..., Tukwila ) was developed. The IA -64 architecture differs significantly from the Intel 64 architecture, which sees itself as IA-32 extension and is compatible with the AMD64 architecture. Intel 64 and AMD64 have also become much more widespread than the IA -64 architecture.
The design is based on a concept called Explicitly Parallel Instruction Computing (EPIC ), which the traditional very long instruction word ( VLIW ) is similar, but contains a number of improvements. In EPIC, the processor instructions that have no dependencies and therefore can be executed in parallel are divided based on predefined patterns in Instruction Groups and so passed on to the processor, which can then decide on the basis of his own abilities, how many of the theoretically possible instruction groups are actually executed in parallel. The idea behind this is that already provides the compiler how much parallelism is possible, and this holds according to the program code, and the processor can utilize the pipelines optimally later, depending on how many instructions it can actually run in parallel.
The architecture attempts to reduce the waiting time to the memory by a large number of registers is provided for each type of data to the processor. Thus, there are 128 64 -bit registers for integer calculations, 128 82 -bit register specifically for floating point data and 64 the 1-bit prediction register through which the commands are executed conditionally. This allows to keep more information in the registers, instead of every time to tread the slow way across cache or memory when data is needed.
For run 32 - bit software, the processor uses a part of the IA-64 register as IA-32 register. There is also a jump in the IA- 32 instruction, with the in the IA- 64 mode (back) is changed. If one uses this on an IA -32 processor, so there occurs a invalid opcode, interrupt.
The architecture has a large instruction set with some high complexity. So there are, among other special processor instructions for multimedia and complex floating point operations.
In the software, the current register contents are written to the stack and brought back after the function in a function call. This causes delays and slows the flow of program. The IA-64 design reduces this latency by this stack operations are performed on the tabs themselves. The so-called register stack engine (RSE ) covers the cases where the registers and the memory should be synchronized.
Although the independence of the IA -64 architecture has been pointed out from the beginning, they wanted to decorate IA-32 compatible with the predicate nonetheless. Therefore Older Itanium versions also support hardware IA-32 instructions on the status of a Pentium III. As this was only a emulation unit, the power is not enough for 32- bit software on an IA - 64 system to the performance of the same software on a comparable x86 systems approach. In addition, Itanium processors are not fully compatible with IA -32, as for example the paging on the IA -64 architecture running and an attempt to with a value to load CR3 ( page directory base register) will be caught by this. Since the Itanium 2 is a software-based version of the x86 emulation called IA -32 EL will be used. This is faster than the hardware-based version, but still more slowly than a comparable pulsed x86 processor thanks to various optimizations. Generally, however, has the ability to emulate IA -32, largely lost their meaning, and all important for the target market software packages are now available in a native IA- 64 version. In addition to the IA- 32 software emulator exists for the emulation of PA -RISC HP -UX ARIES (Automatic Re -translation and Integrated Environment Simulation) package.
Progress or backward compatibility
The IA- 32 architecture is backward compatible to the architecture of the Intel 8080 processor from the year 1974. This means that contaminated sites shall be incurred from previous architectures in new designs. This allows for a modern design approaches can not be implemented in the best possible, on the other hand it is not possible to create a coherent architecture itself ( eg in terms of uniform operation code formats). The advantage of backward compatibility is the easy reusability of existing software without adaptation effort (porting ) and recompiling.
Intel tried to clean up the contaminated sites (also to distinguish themselves from competitors AMD, which mainly x86 patents and skills possessed ) and the IA- 64 architecture published a unique architecture that does not constitute an extension of the existing IA -32 instruction set. The price to be paid for this is that for the IA-32 instruction set written software on the new architecture is limited is executable. Even the further executable code is partly based on software emulated, resulting in poor performance of the software.
This daring step of Intel proved to be on the open market to be unenforceable, in part because of the end-user market remains principally IA-32 processors were made and the IA-32 compatibility mode in the Itanium was extremely slow. The necessary adaptation to exploit the Itaniumfähigkeiten for the huge mass of existing software would have been very expensive, even in the optimistic, problem-free case recompilation and delivery of the software would still be necessary. In the worst case time-consuming fixes, adjustments, or the full rebuild of software would be necessary, for example, there is not always the source code for software, for example, in the event that a manufacturer has gone bankrupt in the meantime. Another problem was an initially smooth performance even of specifically adapted Itaniumsoftware because both software developers and compiler manufacturers had only gain experience with the new Itanium architecture to support them optimally, a knowledge that is already many years for the x86 architecture was built.
AMD followed with the AMD64 the pragmatic concept of backward compatibility on the 32-Bit/64-Bit-Grenze away by a 64 -bit mode extended version of the IA- 32 architecture. AMD was successful and was able to snatch Intel market share. Intel followed AMD eventually architectural, even under the pressure of the OS vendor Microsoft, which announced to the long term only support a 64 -bit architecture of Windows. Intel subsequently published the Intel 64 architecture, which largely coincides with AMD64, but also continue all contaminated sites from 25 years drags (which at today's processors but mainly expressed in the instruction set, as is decoded "internal" anyway in other structures, see microcode ).