Ladder logic

Ladder Diagram ( LAD acronym ) is a method for programming programmable logic controllers ( PLC). In the English language it is called a Ladder Diagram ( LD abbreviation ).

It is a standardized in IEC 61131-3 standard EN graphical programming language that is especially suited for logic control systems; In her presentation she is based on circuit diagrams:

If the elements are connected in series, so this means an AND operation. If they are connected in parallel, so this is an OR operation. A dash through the element means a negation of the element.

Inputs are displayed as two vertical parallel lines, outputs, however, as opposing curved lines.

Example: OUT1 IN1 = IN2 OR NOT

In almost all modern languages ​​LAD but also functional blocks are available, which go far beyond the actual logic control.

Example: maximum search ( LAD Language Step 7 )

If the actual value of variable is greater than Maxsp ( maximum memory), actual value of is taken as the new maximum.

However, as more complex program structures, such as research - Grinding or Case - instructions in LAD are difficult to realize ( to not at all), LD loses for complex control tasks in favor of STL and especially ST increasingly important.

  • Programmable logic controller