MBus (SPARC)

The MBus is a computer bus system, which was used in the SPARC systems of the Sun Microsystems for CPU modules. He is considered the first ( non-proprietary ) standard for CPU modules. He made ​​the connection of processors, cache memory and other computer components ago. The Board dimensions corresponded to those of the SBus cards. The MBus worked with a synchronous clock of max. 40 MHz (optional 25 to 33 MHz). 64 -bit data and addresses are transmitted in multiplex mode, it can be 36-bit address space ( 64 GB ) are physically addressed. The data transfer rate is 80 MB / s ( 320 MB / s peak ). The control of the various processors in the MBus carried out by an arbiter. There was still an interrupt, reset, and timeout logic. On MBus have a maximum of eight processors (quasi ) in parallel.

The Mbus followed a little later the XBus. This uses a packet-switched bus protocol, with otherwise the same electrical and mechanical properties as the MBus. Sun and Cray used the XBus in supercomputers of that time, as in 1996 the Sparc Server 1000 or the Cray CS6400 (64 Super Sparc CPUs to four XBussen ). Another similar development was the KBus the company Solbourne.