MOS Technology 6502
The MOS Technology 6502 is an 8 -bit microprocessor from MOS Technology, Inc., which came on the market in 1975. Due to its simplicity and especially of compared to the established Intel and Motorola processors very low price with great performance, he was in many home computers (such as the Commodore VIC-20 and its predecessor, PET 2001, the Atari 800 XL, Apple I, Apple II and BBC Micro), numerous chess computers ( built such as the Mephisto Polgar with 5 or 10 MHz) and peripheral devices. The processor was developed under the direction of Chuck Peddle.
Other members of this family of processors were very successful, the 6510, a part of the Commodore 64, and the 6507 in the Atari game consoles. Main rival at that time was the Zilog Z80, which was to be found for example in the Sinclair and Schneider computers and in many CP / M computers.
The design of the 6502 was based on the Motorola 6800 ( not to be confused with the younger Motorola 68000 ). The command set is similar, but instead of a 16-bit index register, two 8-bit index register is used, the value is added to a memory ( in the program code) predetermined 16- bit address. That's why 6502 programs have a different style: For arrays that are larger than 256 bytes, an additional programming effort must be. On the other hand, the manipulation of 8 -bit values proceeds much faster on an 8 -bit microprocessor. Unlike 16- bit registers of 6800, or about Z80, which represent an absolute address, set the 8- bit registers of 6502, only an array index represents (in the narrow range of values from 0 to 255), and in some cases, a single 8 -bit increment or decrement command afford both counting the addresses as well as setting the condition for the loop termination at index = 0, leading to fast and compact loops results. The simple instruction set held, however, has that 6502 programs normally require significantly more memory than the same exact amount of 6800 - Z80 or programs; also standards-compliant compilers for high-level languages such as Pascal or C on the 6502 are much more difficult to implement and generate slower code than other 8- bit processors. The reason for this is mainly limited to 256 bytes size of the hardware stack (see below) in 6502 so that the necessary for most modern high-level languages large stack must be emulated by software. To keep the chip area small, the 6502 further has only one accumulator in contrast to the two accumulators A and B in the 6800th
The 64 KB address space of the 6502 is divided into several areas that are primarily oriented to the page limits where the high byte of the 16 -bit address changes its value:
- Zero Page (first 256 bytes ), it serves virtually as a register bank, their content can be accessed very quickly, and each two consecutive bytes may be used as a 16- bit value for a variety of indirect addressing modes.
- The 256 bytes are used as a stack (stack - Page ), which grows from the top down. If the unused stack depth is kept under control, the lower portions of this Page are often used for other purposes (such as normal RAM).
- The entire remaining area, except for the last 6 bytes can be used for any RAM, ROM or memory mapped I / O. The 6502 controlled, unlike, say, the Z80, not Isolated I / O.
- In the last 6 bytes ($ FFFA -$ FFFF ) three pointers are for ( starting from the top ) the "normal" interrupt ( IRQ), the reset vector and the Non Maskable Interrupt ( NMI). So that these storage locations contain reasonable values at reset, the operating system generally or firmware ROM is arranged at the upper end of the address range, while the RAM starting at address 0. At a hardware reset, the memory from address 0 corpus of the program is thus not, as with many other processors simply executed, but the vector from the two addresses $ FFFC / $ FFFD is copied into the program counter and then executed the software from this site.
Technically, the 6502 quite innovative:
- It contained - in contrast to the other microprocessors of the time - already an integrated clock generator need only an external clock signal and of two non-overlapping clock signals ( φ1 and φ2 ) generated for other circuits.
- He was the first microprocessor with rudimentary ( two-stage ) pipeline architecture, that is, when only internal switching steps were necessary for a command, the next command to join the team already data in the memory. A real pipeline with overlap of the read and write accesses multiple commands, it has not yet, however.
- Its instruction set can - at least in comparison to direct competitors Intel 8080 - be considered " almost orthogonal".
- Instead of micro- code it contained a PLA, took over the 130 outputs depending on the machine language instruction and the internal clock signal the internal flow control directly. This allowed the number of required clock cycles per instruction be kept much smaller than the competition.
Variants of the 6502 processor ( as of 2008) are used, among others in the following devices today:
- Processor core, the microcontroller Mitsubishi / Renesas (38000/740 Series)
- VMC Scal Micronas Inter metal ( used in automotive and television technology )
- Calculators like HP - 35s
- Controllers in different PC keyboards
- Controller in digital photo frames ( Sitronix St2205 )
As a cross- compiler cc65 is often used.
- Technology: NMOS, HMOS, CMOS
- Number of transistors: about 3510
- Clock frequency: 20 kHz to 4 MHz traditionally; CMOS version: 0 to 14 MHz
- Clock cycles per instruction: 2-7
- Address space: 64 Kbytes, while no separate I / O address space (such as the Intel 8080 ), that is, all I / O is implemented via memory mapped I / O.
- Address bus width: 16 bits
- Data bus width: 8 bit
- Interrupts: an NMI, an IRQ, and software interrupt on BRK instruction. The reset of the 6502 circuitry is also implemented as an interrupt. The interrupt vectors are at fixed addresses at the end of the address space ($ FFFA to $ FFFF ).
- Commands: traditional 56 CMOS version: 70
- Addressing modes: traditional 13 CMOS version: 16
- Byte order: Little Endian
- Register: Accumulator, 8 bit
- 2 index register (X and Y ), 8 bits are actually the offset register: one each of the registers is a 16 -bit address is added (except for addition of 8 -bit zero page address), depending on the is addressing in machine instruction itself or in the Zero Page.
- Stack pointer, 16-bit, however, the high byte is constant set to $ 01, so that the stack contains only 256 bytes.
- Processor status register bit 7 (flags: Carry, Zero, Interrupt Disable, Decimal, B *, unused, Overflow, Negative)
- Instruction counter, 16-bit
- The Zero Page ( address range $ 00xx ) can be considered due to their special, faster addressing modes and their use in indexed addressing as a bank of registers or register file
* Note: The Break flag only exists on the stack for a BRK instruction, not the processor itself, it has no own set and test commands and is not handled by the commands PLP and PHP.
Examples of machine instructions, or the opcode mnemonics, and in connection with different types of addressing:
In assembler program texts of 6502 the dollar and number sign and the brackets have the following meaning:
The 6502 is known for a number of commands that are not available in the official documentation, but nevertheless exist and function. Colloquially called such orders "illegal opcodes ". Of the 256 possible opcodes in principle are only 151 actual commands. Among the remaining 105 non-documented code, there are many that have the features and functions, quite useful. Some assemblers support such commands, but there is no standard for their appointment with mnemonics. An example:
With many undocumented opcodes can speed up the data processing because they do functions in a few clock cycles, with only several successive commands are otherwise possible, which in total significantly more clock cycles consumed. However, this carries the risk that such commands do not work on all CPUs equally produced or a possible successor to these commands do not control. This makes the program would no longer fulfill its function correctly or not.
More unofficial functions of the 6502 are (only unofficial mnemonics ):
Variants of 6502
- 2002 Yamaha
- Family Microcontrollers Renesas Technology with 740 core. see 740
- 2 KB ROM, 64 bytes of RAM and a UART
- Used in the Commodore 1520 plotter
- Housing and signal compatibility (not software-compatible ) for the Motorola 6800 (without the - mentioned above - internal clock generator of 6502 ). Had to be set after a patent infringement suit Motorola.
- Used in the Commodore PET and CBM models PET CBM 2001 to 8296 and in the VC20 and the floppy drives in 1540 and 1541st
- Used in the Apple I, Apple II, Apple II , Apple IIe and in the non-extended
- Used in the Ohio Super Scientific Board II
- 2 MHz clock
- Used in the Apple III
- Utilized in the 8 -bit Atari home computers 400, 800 and 1200XL at 1.79 MHz (1.77 MHz in PAL mode )
- 3 MHz clock
- Extra pin named HALT
- Utilized in the 8 -bit Atari home computer series XL (except 1200XL ) and XE 1.79 MHz clock (1.77 MHz in PAL mode )
- CMOS technology
- Additional instructions and addressing modes
- No illegal opcodes
- Some commands required under certain conditions, fewer or more clock cycles than in 6502
- Used in the extended Apple IIe and Apple IIc and in some early accelerator cards for 6502 systems
- Manufactured by Western Design Center
- Slightly reduced instruction set ( no bit operations, proper subset of 65816 ) compared to the 65C02
- Used in the Atari Lynx and Watara vision with 4 MHz clock speed
- Manufactured by GTE and CMD
- An additional 16 -bit instructions RMW
- Relative jumps and subroutine calls with 16 -bit offset
- Used in the Commodore 65 ( 4510 ), and the Commodore A2232 7-Port Serial Card
- 3.54 MHz clock
- For multiprocessor operation designed with the 65C112 used as a slave
- Used in the BBC Micro and Commodore LCD
- Used in NES
- 20-bit address bus ( 1 MB) by internal Bankswitching
- Used in the Commodore PET II models (CBM 500, 600 and 700).
- DMA ( AEC pin 5) capable 6502 with additional 8-Bit-I/O-Port, from that in the common pin configuration only 6 bits are brought out.
- Different variants of the same name ( in the variant used in the C64 are for example only 6 bits of ports available)
- Used in C64 with 985 kHz ( PAL version ) respectively 1022 kHz ( NTSC version ) clock
- Used in VC1551 with 2 MHz as 6510T
- Microcontroller I / O ports, serial interface and RAM, Rockwell
- Advanced bit instructions
- Variant of the 6511 with built-in Forth interpreter (3 KB on-chip ROM)
- Variant of the corresponding 650x, but without built-in oscillator.
- Multiply instruction
- Used in Amiga keyboards
- Developed by NEC based on the 65SC02
- Including MMU (2 MB addressable)
- 6-channel PSG
- Used in the PC Engine as HuC6280
- Used only in the Plug-in Board of Commodore SuperPET
- Family Microcontrollers Renesas Technology (formerly Mitsubishi Electric)
- Based on the 65C02
- More than 100 variants
- To 60 KB ROM / PROM / Flash onchip
- To 2 KB RAM onchip
- Extended set of commands multiplication
- Advanced bit instructions
- Stop / Wait
- Transfer ( memory store instructions )
- Special Page
- Bit relative
- 6502 in HMOS technology
- Used in the Commodore 16 and Plus / 4
- 6510 in CMOS technology,
- 6510 switchable to 2 MHz
- Used in C128
- Mitsubishi microcontroller
- Variant of 65816, which is pin-compatible with 6502, address space, therefore, as these only 64 KB
- For direct replacement of the 6502 intended in existing circuits
- Up to 16 MHz
- Developed by Western Design Center
- Used, inter alia, the Apple IIgs, Nintendo SNES (as Ricoh 5A22 ), most accelerator cards for 6502 computer
- 16- bit registers and ALU
- 24 -bit address bus ( 16 MB)
- Up to 24 MHz
- Does compared to 6502 due to the additional address bytes for many commands one clock longer
- The fictional robot Bender from the cartoon series Futurama has a 6502 processor as the CPU.
- In the movie The Terminator (1984 ) is from the perspective of the terminator a 6502 assembler program displayed (probably from the Apple IIe ). Furthermore, the result of the checksum program Key Perfect ( in version 4.0), which was published in Nibble magazine, appears.
- According to Heise the processor variant 65C02 again (26 January 2012) is available
- A simulation on his transistor level down was created for this processor