MOS Technology 8563

The MOS Technology VDC ( Video Display Controller) is a video display controller, which is responsible for the 80 - character output at the Commodore C128. It is connected to a monitor with RGBI input (eg CGA screens ). Originally, the 900 VDC for the CBM has been developed, a computer system with a Zilog Z8001 CPU. There two non- interoperable versions were produced, the 8563 and the 8568th The chip has its own video RAM, this is 16 KB in size in the old C128 versions, the newer C128DCR 64 KB, however, can address both 64K. The chip is clocked asynchronously to the rest of the computer.

Specifications

Programming the VDC

The VDC has 36 ( 8563 ), 37 ( 8568 ) internal registers. Register 37 was added during 8568, whereby the refresh can be clocked faster than its predecessor. Accessible are the internal registers only indirectly via two memory cells in the I / O area at the hexadecimal addresses $ D600 and $ D601. In address $ D600 is specified which tab you want to access, the addressed register is at address $ D601 then read or written. In this case you have to wait until bit 7 set of $ D600. When C128 this is easiest with the following two operating system functions ( in Basic):

  • $ CDCC ( value in the accumulator to the VDC registers X Write )
  • $ CDDA (value of VDC register X into the accumulator pick )

Address $ D600 has other meanings when reading is obtained:

  • Bit 7 = Status bit: here you learn whether the VDC with his last work is ready (0 = Done).
  • Bit 6 = light pen ( light pen )
  • Bit 5 = cathode ray return: 1 = return.

The other bits are not used.

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