Multi-level cell

MLC memory cells (MLC for short English multi-level cell) memory cells, in which in principle more than one bit per cell can be stored. Storing more than one bit is achieved in that, unlike conventional SLC memory cells (SLC short for single-level cell ) is more than two states (English levels ) - unloaded and loaded floating gate - is stored in a cell.

The storage of multiple bits per memory cell has the disadvantage that the read and write speed is reduced and a failure of the cell, the bit error rate ( Bit Error Rate Sheet BER) increases. For this reason, more complex error correcting method for securing the information content of the data is required. As a rule, BCH codes are used.

Flash memory

The technique is mainly used in the NAND flash memory in which each memory cell is composed of a MOSFET with floating gate, a plurality of bits - the time (2009) up to four - can be saved. Thus, the storage density is increased. Since the advent of memory cells capable of storing three bits per cell ( TLC memory cells) the term MLC memory cell is often used interchangeably for the 2-bit memory cells.

Since MLC SSD storage for the same storage capacity less chip area, MLC SSD storage is much cheaper than SLC memory and is used mainly for read-intensive storage needs. For products that are based on flash memory (eg USB sticks) the SLC or MLC abbreviations in the product can provide information on the use of SLC or MLC.

Background

In many memory devices, a bit is stored in each memory cell, such as in DRAMs, by one of two possible states is stored in the cell. In this case, a state is a logical 0, a second state is assigned to a logical 1. In DRAM corresponds to a voltage of 0 V in the cell logic 0, a voltage equal to the voltage VBLH ( engl. voltage bit line high ) of the logical first

At different memory technologies, it is possible to distinguish more than two states of the memory cell to assign as corresponding to more than one bit. This is so far mainly used for flash memories, however, research is being conducted for other types of memory on this topic, such as PCRAM.

Pros and Cons

The main advantage of multi-level storage, the higher storage density, since more than one bit per cell, is stored. Thus, on the same chip area twice (or even higher ) amount of information is stored in a memory as with single-level storage. Particularly in the case of semiconductor memories, this provides significant cost advantages since the required chip area is a significant cost factor in the production.

The disadvantage is that on the one hand the evaluation of the memory content occurs slower in multi-level storage - since the distance to the threshold value is smaller - and must be carried out with more complex circuits. Due to the smaller distance to the threshold value, the error rate is greater as compared to the single-level storage minor changes the memory state enough to fall into a neighboring state, and thus to alter one or more bits. Compared to the single-level storage complex error correction method of securing the information content of the data is required, usually be used in flash memories BCH codes.

Example

PCRAM in a memory cell to accept the resistance values ​​within a broad range, eg, from 10 k to 10 M. The following assignments to bit values ​​and the threshold values ​​between the states could be defined so that multiple bits per cell to be stored (see table).