Open collector
The open-collector output ( OC) ( German for " open collector " and " unconnected collector ") is an output of an integrated circuit with a bipolar transistor with open collector output. He usually serves to allow connection to a higher voltage level or the logic operations AND (English AND) and OR ( eng. OR) as so-called wired-AND and wired- OR operation in bus systems such as the I ² C bus to allow.
As more field effect transistors used in integrated circuits having a so-called drain terminal instead of a collector connection, this output is also referred to as an open- drain output.
Explanation
It is the inner life of an analog or digital ICs generally in input terminals, switching logic and output terminal ( output ports ) divide. In most cases, a voltage level between VOL VOH and is set at the output. Wherein analog ICs also any intermediate values are allowed in the digital IC is enforced by the internal logic circuit, at the output a "low, 0" ( VOL) or "high, 1" ( VOH ) is applied. It is important to understand that in Output shown (which may vary by emitter followers, short fuses and other variations of principle shown ), the output voltage level is always between VOL and VOH, and can not be lower or higher. Depending on the circuit VOL may be equal to VOH and V equal to V , so that simplified terms, the output voltage VO between V-and V is. If both limits are reached, then it is spoken of rail-to -rail technology, as in the circuit diagram look like V- and V as the rails of a railway track.
It happens now that must be used in an electronic circuit with common ground and different V levels. A typical example is the blending of the analog signal conditioning with any V level and processing the signals to microcontrollers in which V must be set to 5 volts. Or outputs digital processing must be made higher or lower than 5 V on the voltage level. These are indicated by the overhead different V lines in the picture. During a handover of analog voltage levels from left to right can still be a problem ( 3.635 V are always 3.635 V), so it looks to the digital information "0" and "1" a lot more critical, because in the middle " 1 " for example, is at 4.8 V, which with a V voltage of eg 20 V as in the right part, " is interpreted 0 "because 4.8 V well below 0.5 · 20 V = 10 volts.
The link between the components of a level to another are open-collector outputs, which, as shown, the collector of a transistor without further internal wiring ( engl: open = open) to the outside of an IC connection is made. He therefore behaves outward like a on-off switch ( which is not defined, which logical state on and are assigned to ). In the example shown are resistors which are connected to the V level of the " reception component " is switched from open collector transistor in the on state with respect to ground, that is, the input of the receiving component provides a binary " 0". If the open-collector transistor is not driven, ie it is non-conductive, the level is pulled to V , the input component (assuming that this resistance is small compared to the input resistance). The input therefore provides a binary " 1". Therefore, these resistors are also called pull-up resistors. These are in most standard ICs not implemented, so they must be provided externally, but there are microcontrollers, which allows individual ports as inputs configured with integrated pull -up resistor.
Open-collector terminals may also have properties that are missing the remaining transistors of an IC. A classic example is driving transistors for number ads that can be applied, for example, with up to 30 V, although the IC =, as members of the 74 -seater series of standard digital ICs only for V 5 V approved. The "Discharge" ( = discharge ) port of the famous timer IC NE555 is an open -collector connection with a fairly high permissible current load.
Digital ICs and use of OCs
The open collector output is one of five possible output types ( also totem pole, tri -state, complementary output and open emitter output) for digital integrated circuits. Here, the collector resistance of the output stage is omitted, so that you can put together several outputs to a bus.
It may well tasks occur in which many gates must be on the output side connected. For example, if 25 gate outputs are summarized by an OR gate, so you would have to run 25 lines to an OR gate with 25 inputs. This is not only very costly, such gates are also not available on the market. You could solve this problem by cascaded OR gates, but then would get even different signal propagation times.
Better to use this gate with open collector output. These have an NPN transistor at the output, and the emitter is connected to ground (English ground), and the collector output is not connected is brought out to the output. Such outputs can now be connected in parallel without further ado, and connect with a common collector resistor to V .
The output voltage Vout is in positive logic only in the HIGH state when all connected gate outputs are also high, ie, disable all output stages. On the other hand, it can be seen that the output voltage is in the low state, even if only one output is in LOW state. This results in positive logic for an AND combination of the outputs.
This open-collector circuit technology can also be realized ORing by interconnecting the negated outputs of gates as well with their open collectors and then negated. After de Morgan applies:
A corresponding circuit is shown in:
One can see that the AND operation of the NAND gate outputs with subsequent negation provides an OR function. WIRED - AND and WIRED -OR structures are used for example in the implementation of " programmable logic arrays" (PLA).
Symbols according to IEC standard
The diamond describes the high-impedance output and the bottom line is that low-resistance connection from the level to the exit. Their arrangement above and below shows which state at which level is. So now is the pound above the horizontal line, the H level is high impedance ( no voltage applied ) or the L- level (ground ) connected directly to the output.