Propagation delay

As gate delay is referred to in the digital and the electrical engineering the components used ( gate ) inherent, structurally related term. This means that the device responds to a change to its input after a certain period at its output. This time ( engl. referred to as propagation delay time, abbreviated tP or tPD ) is referred to as tPLH for switching operations on the output from L to H. For switchover at the output from high to low, this delay is referred to as tPHL.

Both switching times ( tPLH and tPHL ) are typically different and are indicated by the component manufacturers in the data sheets. Furthermore, the switching times of the components can vary, for example, through different production batches, change with a change in the supply voltage or these times may change slightly with changes in temperature. For these reasons, the component manufacturers give each for each of the two times in a total of three values ​​( minimum, typical and maximum value ). Here are the component manufacturer must ensure that the minimum value in the worst case (worst case) is not exceeded and the maximum value is not exceeded. The third value is the typical value that you have many devices on different batches of time. Another problem is that typically identical gate from different manufacturers also have different maturities. In practical use of the components is also the fact that the gate delays can with a temperature change within the specified limits change ( minimum value and maximum value ).

The consequence of a failure to comply with the gate delays may be timing violations and glitches in the circuit.

Gate delays in digital systems are usually in the range of 100 ps to 100 ns, with components in the slow interference- logic ( LSL), this time can be even greater. The measurement is carried out, for example, a ring oscillator, or pulse generator and an oscilloscope ( see typical values ​​: logic family).

Specific methods for the determination of total transit times through any network provides the so-called runtime tolerance calculation.

• Digital technology