Racetrack memory is existing as a concept store with a magneto- electronic operation. The concept was developed in 2008 by Stuart Parkin and his team at the company IBM. The first prototypes were presented in December 2011.
The Racetrack memory stores the individual bits of memory in nanowires made of ferromagnetic material. The information is stored in the form of oppositely magnetized regions (domains) in the nanowires, wherein between 10 and 100 bits can be accommodated in a nanowire. The bits are in these wires on a tape side by side as before and must be serially pushed past for reading or rewriting at a reading station. The wire may therefore be regarded as a kind of shift registers. In that the read and write electronics for a large number of bits needs to be unique, the space required for a memory bit is extremely small.
There are then ways to optimize between the number of memory bits per reader station and average storage density, which can lead to rather MRAM or disk -like variants. Wherein the spatial arrangement of the three-dimensional memory wires embodiments are conceivable based on the surface area can increase further storage density. In this three-dimensional arrangement of the nanowires, or a race track 100 times higher storage density is possible, compared with conventional memory cards today.
Overall, the memory is similar to the magnetic bubble memory.