Transactional memory

Transactional memory is a main memory concept for parallel computing units that access shared memory areas, such as threads or multi-processor systems. The aim is to ensure that the execution speed over previous methods to improve synchronization as well as to solve the problems of synchronization, resulting in parallel software, especially if this consists of a plurality of independently developed components. Transactional memory can be implemented either completely in software (STM ) as a hardware (HTM) or with hardware support ( hybrid HTM).

Existing systems running supported by hardware transactional memory, there were initially only as research prototypes, such as the ATLAS system at Stanford University. Meanwhile, the systems are, however, ready for series production. The first processor with a transactional storage was IBM's Blue Gene / Q. Intel announced in February 2012 to equip its next generation processor called Haswell with transactional memory.

The concept is by Maurice Herlihy and Eliot Moss.

Concept

Parallel programming often leads to blockages within the system ( so-called deadlock ). Transactional memory should solve this problem in principle and thereby greatly simplify the parallelization of software.

The idea of ​​transactional memory comes from the architecture of database systems. A transaction bundles commands that access to shared resources. If two transactions want to access the same resource, one of the two transactions is aborted. These are the occupied resources and resets all changes made ​​. Which transaction is aborted, decides an intelligent management mechanism, the heart of a transactional memory.

Availability

Until now there was only software-based method for implementing transactional memory ( software transactional memory STM) which, however, are slower than hardware-based methods. The more time that is needed for programs that use the STM is to big to compete with conventional systems with synchronization mechanisms.

The computer chip maker Intel demonstrated the speed advantage of transactional memory the first time at a developers conference in early 2006, but only based on a software simulation. With the upcoming Haswell architecture, Intel plans to offer the concept under the name of Transactional Synchronization Extensions as x86 architecture extension.

At ISSCC 2008, Sun Microsystems introduced with the ROCK processor details of a 16 -core Sparc processor with hardware -assisted transactional memory. Its development, however, was set with the acquisition of Sun by Oracle in 2010.

Research models

  • UTM - Unbounded Transactional Memory
  • LTM - Large Transactional Memory
  • VTM - Virtual Transactional Memory
  • LogTM - Log -based Transactional Memory
  • TCC - Transactional Memory Coherence and Consistency
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