x87

X87 refers to a subset of the instruction set of the x86 architecture for floating-point calculations. It is the oldest instruction set for this architecture. Your commands are not necessary to produce working programs, but they offer hardware implementations for common numerical tasks that are so essential done faster. For example, the x87 instruction set contains instructions that calculate the sine and cosine of a value. Before the x87 instructions could be processed by the processors, the compiler or programmer had to invoke slow software library procedures, to perform such floating point operations. This approach is in many low-cost embedded systems are still often necessary. Alternatively, in systems that do not have floating point, fixed-point arithmetic, since these can be efficiently implemented in integer arithmetic units.

Until and including the i486SX the x87 commands have been implemented by a separate coprocessor. This coprocessor had to be purchased separately and inserted into the appropriate socket on the motherboard. With respect to the emulation of software was the floating point calculation for a 80x87 FPU 75 - to 100 - times faster.

In later x86 processor generations, ie from the Pentium FPU part was usually already integrated in the main processor. The term x87 but is still used to indicate the subset of the command set, originally processed in the x87 coprocessors. Since the introduction of SSE2 x87 units have lost much of its former importance. For computations that require a mantissa of 64 bits, as is possible with the 80 -bit x87 registers, but they are still important.

Implementation

The x87 family does not use directly addressable registers as the main register of the x86 processors; instead form the x87 register an eight- stage deep stack, which runs from st0 to st7. The X87 commands work by place values ​​on the stack, use it there for calculations and take them down again. Therefore, the x87 coprocessor works like calculator, designed for reverse polish notation. However, two -digit operations such as FADD, FMUL, FCOM and so on can either st0 or st1 implicitly address, or alternatively use st0 together with another register or a memory operand. st0 can therefore as an accumulator ( a register that is both a target register, as well as an operand ) can be employed and it also can with another stack register using the command FXCH st (x ) to be exchanged. The x87 stack can thus be a seven -addressable registers and used as an accumulator. This is especially on superscalar x86 processors ( such as the Pentium from 1993) useful where these Exchange commands are optimized so that they will not delay subsequent FPU instructions. For this purpose, not the FPU, which covers the following floating-point operations, but another calculator is used for each exch command.

Introduced in the Pentium MMX extension of the X86 architecture called MMX uses the same physical register as floating point unit. This simplified the launch of MMX, since a task switch, no additional registers must be saved and therefore no adjustments in the operating system for MMX are necessary. It is the responsibility of the application program, the processor of the x87 in the MMX mode and then switch back. However, this mode changes are relatively slow, so Intel and AMD went a different route with the later command extensions (SSE and successors).

IEEE compatibility

The X87 commands are compatible with the IEEE 754 floating-point numbers can The floating-point single-precision ( 32-bit float or real, in most languages) double-precision (64-bit, double) or full 80 bit ( long double or extended) process. Since the processors internally use the full 80 bits ( the preservation of accuracy over many calculations to allow ), curves are not exactly carried out, such as the strict 32 - and 64- bit formats of the IEEE 754 require it, unless a special rounding mode is set via a status register. A sequence of arithmetic operations can be therefore slightly different behavior of strict IEEE -754 formats.

Differences in the results of a calculation chain may also arise solely through the activation of optimization when compiling. An optimized version of a program is thus a ( usually slightly) different result than provide a non-optimized version, as it is often used for debugging.

X87 coprocessors Intel

8087

The 8087 was the first math coprocessor for 16- bit processors from Intel ( the 8231 was older, but for the 8 -bit 8080 designed ); it was built to be used with the 8088 and 8086 together.

80287

The 80287 ( I287 ) was the math coprocessor for the Intel 80286 series. Intel and its competitors led later to 80287XL, who was actually a 80387XS with a compatible pinout to 80287. The 80287XL contained a 3/2-Multiplizierer so motherboards that run the coprocessor with two -thirds of the CPU speed, instead the floating point unit with the same speed as the CPU could operate.

The 80287 and 80287XL also worked with the 80386 and 80387 were until the introduction of the single 1987 for the 80386 available coprocessors. In addition, they could also be used with the Cyrix Cx486SLC. However, the instruction set of the 80387 was preferred for both processors for performance reasons and because of the better options.

The following models of the 80287 were prepared:

• I80287 -3 ( 6 MHz)
• I80287 -6 ( 6 MHz)
• I80287 -8 ( 8 MHz)
• I80287 -10 ( 10 MHz)
• I80287 -12 ( 12.5 MHz)
• I80287XL (12.5 MHz, 387SX - core )
• I80287XLT (12.5 MHz, laptop version )

80387

The 80387 (387 or I387 ) was the first Intel coprocessor, which was fully compatible with the IEEE -754 standard. At its launch in 1987, a full two years after the 80386, the I387 was much faster than the 80287 and contained significantly improved trigonometric functions. ( The 80827 had allowed only arguments between -45 and 45 degrees for them. )

The I387 was manufactured with CMOS technology in III 1.5. His was the 7.5 mm × 7 mm in size.

Versions

From I387 later three more versions were produced:

The i387DX was introduced in 1989 and was only compatible with the 386DX. It was produced with CHMOS IV technology in 1.0. The The the 387DX was 5.5 mm × 5.5 mm in size.

The I387 was only with the standard 80386, which had a 32-bit processor bus compatible. The later, lower-cost i386SX with a narrower 16- bit data bus could not be merged with the 32- bit bus of I387. Therefore, the i386SX required a separate variant of the coprocessor, namely the i387SX, which was compatible with the narrower the SX bus.

As the i387DX was made in 1.0 micron and the i387SX with CHMOS -IV technology.

These specially intended for i386SL processors and also produced with CHMOS IV technology variant was launched in 1992 and has as the i386SL an integrated power management.

The i387DX i387SX and could be operated in an asynchronous clock to the system clock (* 0.8 * 1.25 ).

80487

The I487 is a FPU coprocessor for the i486SX. He was basically a complete i486DX chip. It was installed in a i486SX system, the I487 turned off the main processor and took over all CPU operations. In theory, could still operate such a machine if the actual i486SX processor would have been removed. In practice, a pin on the I487 prevented, however, the use as a full i486.