Intel 8259

The Intel 8259 is a programmable interrupt control block ( Programmable Interrupt Controller PIC), which was primarily developed for the Intel-8080/8085-Prozessoren. Later, the chip was also used together with the Intel 8086/8088 and its successors. The block is mainly supplied in 28-pin DIP. He was licensed to NEC and Siemens among others.

He has 8 interrupt inputs and an interrupt output. It has been used for the first computer (IBM PC - XT). The inputs are connected to the interrupt pins of the devices in the system (keyboard, timer, printer, etc. ), the output to the CPU.

Use

The 8 inputs soon no longer sufficient due to the growing number of devices in the system, and there were two blocks are used instead. In this case, the output of one module ( slave) is connected to an input of another block ( Master) ( normally at the entrance # 2). The functionality of these two blocks is no longer implemented in separate chips on modern motherboards, but is integrated into the chipset.

The following figure illustrates the cascading, and shows a sample configuration of the inputs:

PIC 1 (Master) -------------- PIC 2 (slave ) | IRQ 0 < --- ------------- Timer | IRQ 1 < --- Keyboard | IRQ 8 < --- real-time clock | ------------------ IRQ 2 | IRQ 9 < --- ... | IRQ 3 < --- Serial | | IRQ 10 < --- ... | IRQ 4 < --- Serial | | IRQ 11 < --- ... | IRQ 5 < --- Sound Card | | IRQ 12 < --- PS / 2 mouse | IRQ 6 < --- Floppy | | IRQ 13 < --- coprocessor | IRQ 7 < --- Parallel | | IRQ 14 < --- hard disk ------ ------- Port | | IRQ 15 < --- hard disk         | | ----- -------         | | |         | --------------         |         --- >>> To CPU Most inputs are determined by the architecture of the PC, and are not used by other devices, even if no corresponding device exists.

The interrupts are processed in a particular order, which is determined by the input during 8259. Normally, the input 0 has the highest priority and the input 7 the lowest priority. This results in the following sequence: 0, 1, (2 ), 8, 9, 10, 11, 12, 13, 14, 15, 3, 4, 5, 6, 7 IRQ numbering is predetermined from the motherboard: the 8259 adds the number of the input to a configurable value, and then passes it to the CPU. Numbering is but usually as indicated in the sketch.

The IRQ 2 itself is not used, it is the " pass-through " for the IRQs of the second 8259 (so-called cascade, one speaks in this functioning of cascading of 8259 ).

The limited number of inputs, the inflexible and slow programming and especially the lack of multiprocessor system development support have a successor, the APIC system performed. Although the PIC, although for reasons of compatibility exists in current chipsets still next to the APIC, it is no longer used by modern operating systems.

Literature and data sheets

  • Josef Koller: 16 bit microcomputer, 1st Edition, Hofacker Verlag, Munich 1981, ISBN 3-921682-80-0, chap. 4.2.1 " Interrupt Controller 8259A ", pp. 191-201.
  • Martin Ernst, Andreas Stiller: PC devices. Interrupts: The long road to a request for operation, c't, 1988, Issue 8, pp. 174-187.
  • Microcomputer modules, Data Book 1979/80, Volume 3, peripherals, Siemens AG, No. B 2049, pp. 193-229.
  • NEC Electronics (Europe) GmbH, 1982 Catalog, pp. 675-692.
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