Memory address register

The Memory Address Register (MAR ) and the memory buffer register ( MBR) are registers a von Neumann CPU. They serve as a cache server and reduce the negative impact of the von Neumann bottleneck.

Most von Neumann computer is implemented internally as Harvard Architecture, which is why a distinction between data and address bus. In many systems, both buses have a different width.

Memory Address Register

The memory address register ( German memory address register ) contains the address of the memory word to be read or written next. Therefore, it is as wide as the address length.

Memory Buffer Register

The memory buffer register ( German storage buffer registers ) is used for intermediate storage of the memory cell contents so that the contents in a plurality of independent instructions can be used. The MBR therefore must have as the memory cells of the same width.

• Computer Architecture