Scalable Coherent Interface

The Scalable Coherent Interface ( SCI, English) is in computer technology Busähnliche a connection between multi-processor systems.

It has been written in the standard IEEE 1596 and implemented in various CC- Numa architectures. The standard describes a physical interface and protocol for memory management, in particular the cache management and protection of data Koheränz.

The interface is configured as unidirectional point-to- point transfer rates between 1 Gbit / s ( bit-serial ) and 1 Gbyte / s (16 bit parallel).

Swell

  • Andrew S. Tanenbaum, James Goodman: Computer Architecture Prentice Hall, 2001, ISBN 3-8273-7016-7.
  • Thomas Flik: Microprocessor Technology Springer-Verlag, 2001 ISBN 3-540-42042-8.
  • Computer Architecture
  • Bus system
Institute of Electrical and Electronics Engineers Cache (computing) Simplex communication Integrated Authority File
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