Software Pipelining
Software pipelining refers to the programming of a processor having multiple execution units, so that as many of them are occupied simultaneously. The procedure is used to calculate the time for a shorten by several expected parallel execution units simultaneously.
Software pipelining is used for parallel processing of instructions from a single thread (English Instruction Level Parallelism ). In contrast to the parallel processing of instructions, which is supported by modern processors, anyway, it is called software pipelining when the same calculation is performed on a vector of input data (that is, a form of SIMD ) and special attention to the arrangement of instructions in the instruction stream (English Instruction stream) was laid.
As opposed to a pipeline within a processor that divides the individual processing steps of the machine instruction, so that several instructions can be processed simultaneously ( in various stages of completion ) in a software pipeline several machine instructions are involved for performing a calculation on a set of input data. This also means that the software pipelining is explicitly influenced by the programmer and not a property or functionality of the processor, but the properties are superscalar and pipelined architecture used, which allow the parallel execution of commands. In contrast, the processor pipeline can not be manipulated by the programmer.
Example
It is to be y = (x 3) * 2 is performed, that is, a vector of values of x (i ) is to be increased by for each element 3, and then doubled. If the processor has two execution units for arithmetic instructions, then they can be assigned as follows:
Legend:
- I is the current index
- In the second column can be seen the calculation, which is performed by execution unit A
- R (i) is a register which stores the intermediate step of the calculation
Software pipelining requires that the processor can decode and execute more than one instruction at a time.
The term pipelining is because the steps of calculation are carried out as in an assembly line in sequence. Since the calculation of a value of each take only one step of the pipeline to complete a stroke, several data sets can be processed concurrently ( in various stages of completion ).
General Software pipelining is supported by all superscalar processors, often with the help of loop unrolling and register renaming in the compiler. The IA -64 support software pipelining particular, loop unrolling is not necessary to register renaming is performed by the processor during the execution of the register stack engine.
- Technical computer science