Delay-Locked Loop

In a Delay - Locked Loop (DLL) is an electronic circuit which is constructed similar to a phase locked loop (PLL). The main difference is the absence of the PLL voltage controlled oscillator, it is only applied to the input clock signal used as a time-delayed output signal. To this end, an adjustable delay chain is provided, which is also the name of this circuit is derived. The advantage of this loop to a phase-locked loop is in the lower circuit complexity.

Function

Externally the DLL as a negative time delay can be considered due to its loop ( feedback). An essential component of a DLL is a variable delay chain, which is formed by a chain of individual elementary delay elements with a fixed delay time. The instantaneous deceleration of the entire chain is dependent on the phase relationship between input and output, and is set by a control signal dynamically during operation. Depending on the type and application, the phase discriminator used to compare to the minimum error or a configurable, non-zero phase angle.

Analog DLL work with the following two types as delay chain:

  • Current-starved inverter
  • Shunt Capacitor Delay Stage (also Capacitor - Loaded Inverter Delay Line )

Digital DLL, the control signal formed by the phase detector acts on a multiplexer, which minimizes the phase error in discrete steps. At the output of this multiplexer is then present at the output of the DLL. Additional loop filters are used in practically realized DLL between phase discriminator and delay chain, which influence the dynamic behavior of the control loop.

Applications

A DLL is used primarily for adjusting the phase position of a free running clock signal in the field of synchronous digital circuits, in order to obtain frequency-independent phase shifts. DLLs are used, for example, in the Xilinx FPGAs for processing of supplied external clock signals and to compensate for gate delays. DLLs are used in most DDR SDRAMs to face the clock signal to control the timing of the outputs (except in GDDR5 modules, a PLL is used).

In GPS receivers, these circuits are used in each case to follow a satellite signal. An extension to the DLL is the VDLL Vector delay lock loop, which promises a tracking under even more adverse circumstances, but currently is still the subject of research.

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