Juris Hartmanis

Juris Hartmanis ( born July 5, 1928 in Riga, Latvia ) is a Latvian- American computer scientist who received the Turing Award with Richard Edwin Stearns in 1993 for his research achievements in the field of complexity theory.

Life

After the Second World War Hartmanis fled first to Germany. He earned a degree in physics at the University of Marburg and emigrated to the United States of America, where he completed a master's degree in Applied Mathematics at the University of Missouri- Kansas City. Finally, he obtained a Ph.D. in 1955 at Caltech in mathematics at Robert Dilworth.

Subsequently, he worked for the General Electric Research Laboratory, where he researched and taught principles of computer science. In 1964, he and Richard Edwin Stearns published the for complexity theory pioneering and eponymous Paper Computational complexity of recursive sequences (1965 re-released On the computational complexity of algorithms ), in which they DTIME and thus generally introduced complexity classes and an early speedup theorem among others. Together with Phil Lewis led Stearns and Hartmanis 1965 in addition to the time and the space complexity.

In 1965 he became a professor at Cornell University. To Hartmanis ' doctoral heard Neil Immerman ( Gödel Prize in 1995 ).

Hartmanis a member of the Science Board and the Science Steering Committee of the Santa Fe Institute.

Awards

• Grand Medal of the Latvian Academy of Sciences
• Elected member of the National Academy of Engineering
• Fellow of the American Academy of Arts and Sciences
• Turing Award
• Honorary doctorate from the Technical University of Dortmund

Writings

• With Richard Edwin Stearns: On the computational complexity of algorithms. Transactions of the American Mathematical Society 117 (1965), pp. 285-306. First as Computational complexity of recursive sequences. In: Proceedings of the Fifth Annual IEEE Symposium on Switching Circuit Theory and Logical Design, Princeton, NJ, 1964, pp. 82-90.
• With Richard Edwin Stearns and Phil M. Lewis: Hierarchies of Memory Limited Computations (PDF file; 388 kB). In: Proceedings of the Sixth Annual IEEE Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Mich., 1965, pp. 179-190. .