Logic synthesis

The logic synthesis is an area of ​​computer science and electrical engineering / communications engineering that deals with the design of circuits that implement a Boolean function. The basis is the Boolean algebra. The aim is to find out the many possibilities for the realization of a Boolean function the most cost effective. For the realization of Boolean functions by a PLA is cost-effective, a Boolean function with as few lines (corresponding to the monomials of Boolean expression ) and a total of as few transistors per line (corresponding to the literals of the Boolean expression ) to find. This is achieved by the method of Quine and McCluskey or the outdated method of Karnaugh - Veitch - diagram.

For FPGAs the task more complex because the same function from different basic elements of the FPGA is to be realized. For example, a 4-bit shift register from:

• 4 flip-flops or
• SRL16 a macro ( 16-bit shift register ) or
• SRAM Block

Be realized.

Summarizing the operation of the shift register, and a general use of this parallel-serial conversion is more implementation options are possible:

• Multiplexer 2bit counter
• Multiplier block

For an optimal solution in this case the logic equations are to be supplemented by boundary conditions ( engl. constraints).

In the development of digital integrated circuits, such as microprocessors, logic synthesis is the one of several design steps.