Parallel communication

The parallel data transfer describes transmission method in which a plurality of symbols at the same time, i.e. in parallel, to be transmitted. The transmission takes place over multiple physical lines next to each other or across multiple channels at the same time. Only binary symbols with two possible states used, a symbol corresponding to one bit, which can be transmitted per data path. With n parallel data paths of n bits can be transmitted in parallel in one step.

General

The number of parallel data paths is not generally defined. In some cases, such as the parallel port, a multiple of eight is selected, so that a byte can be transmitted to each of 8 bits per step. In some applications, additional parallel data paths for the transmission of meta information such as a check sum ( parity bits ), data flow control, or a clock signal used.

The contrast is the serial data transmission, in which a symbol is transmitted by one and only one transmission channel is present. A reaction between the parallel and the serial data can be transferred by means of special components, which are referred to as the SerDes.

Disadvantage

The need for the substantial disadvantage of the parallel data transfer in addition to the fact a large number of parallel data transmission paths is the fact that the individual transit times along the parallel lines are not all exactly the same. These inequalities can be caused for example by small deviation in the line lengths and other tolerances in the physical construction of the link. This results, particularly at higher step rates to reception error or a limitation of the step speed, and thus the data transfer rate. For this reason, a serial transmission method is used, even if high symbol rates and large bandwidths are the result by the serial concatenation of the individual symbols at higher transmission rates.

Practical examples from the computer, where parallel data transfers were replaced by serial ports, the parallel port ATA / ATAPI, which was replaced by Serial ATA at a higher data transfer rate. Another example is the bus interface Peripheral Component Interconnect ( PCI), which was designed as a parallel port and was replaced in subsequent years by the serial version of PCI Express.

In certain areas, such as the connection of high-speed memory systems such as DDR SDRAM to a main processor, to parallel data transfers can not be avoided. In this case, an attempt is made by a meander shape shaped conductor rail guides on the circuit boards to ensure identical running time between the individual signals. The meander is to ensure that all conductive tracks almost exactly the same length to each other. In addition come in the individual circuits, such as the DDR SDRAM chips, delay-locked loop ( DLL) application, which compensate for time differences dynamically and so ensure a parallel data transfer at high clock rates.