Rise Technology

Rise Technology was founded in 1993 as a privately held company. Goal was to produce a competitive x86 processor with special power-saving mechanisms, especially for notebooks.

This was achieved in 1998 with the Rise mP6: The CPU had a triple pipelined design and could, among other things Run 3 MMX-Instruktionen/Clock. The FPU was also a pipelined design, which ensures high performance with the result. Especially in comparison to WinChip series of Centaur Technology, and the Rise of 6x86MX/MII-Serie Cyrix mP6 convinced with a very good performance.

The launch and availability of Rise mP6 was repeatedly postponed, so that he never really came on the market. The successor Rise mP6 - II with integrated L2 cache (similar to AMD K6 -III) and Tiger S370 were never presented.

Rise then directed to the iDragon his focus from desktop CPUs on SoCs.

On 12 October 1999 SiS announced that it has licensed the CPU technology and other intellectual property of Rise. SiS has the CPU technology then integrated into the SiS55x SoC family. The CPU part of this SoC largely corresponds to the Rise mP6. SiS sold the technology to DM & P, where it is used in the Vortex86 SoC family.

Also STMicroelectronics uses technology in his Rise CP250 family ( Vega ). Also, this largely corresponds to the Rise mP6.

The technique of mP6 - II or even the Tiger S370 has emerged until now again in any other product.

Model data

MP6

  • Code Name: 6401 (0.25 micron, 2.0 multiplier )
  • Kirin or 6441 (0.25 microns, multiplier 2.0 and 2.5)
  • Lynx or 6510 (0.18 microns )
  • Fast pipelined FPU
  • TriplePiplined design
  • PR266: 200 MHz (100 MHz FSB)
  • PR150: 150 MHz ( 75 MHz FSB), only as a pattern
  • PR166: 166 MHz ( 83.3 MHz FSB), only as a pattern
  • PR233: 190 MHz ( 95 MHz FSB), only as a pattern
  • PR333: 237.5 MHz ( 95 MHz FSB), only as a pattern
  • PR366: 250 MHz (100 MHz FSB), only as a pattern

MP6 II

  • Code Name:
  • L1 cache: 8 8 KB ( data instructions )
  • L2 cache: 256 KB at full speed
  • MMX
  • Super Socket 7 (100 MHz FSB)
  • Dual Voltage
  • Features: fast pipelined FPU
  • TriplePiplined design
  • 366: 250 MHz
  • 380: 285 MHz
  • 400: 300 MHz
  • 466: 350 MHz

Tiger S370

  • Code Name:
  • L1 cache: 8 8 KB ( data instructions )
  • L2 cache: 256 KB with processor clock
  • MMX
  • Socket 370
  • Dual Voltage ( 1.8V Core / 2.5V I / O)
  • Features: fast pipelined FPU
  • TriplePiplined design
Silicon Integrated Systems TSMC List of microprocessors List of Intel microprocessors
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