Small Outline Integrated Circuit

SO stands for Small Outline ( " smaller floor plan " ) and refers to a housing for Integrated Circuits (IC). SO ICs are 30-50 % smaller than corresponding DIL ICs. This is a surface mounted device design ( SMD), which is a " surface mount ". The base is rectangular, the longer sides are two rows of pins available. The pins are of type gull wing, are therefore the side.

Despite the similar name no ICs are on memory modules such as SO- DIMMs used in the SO- design. There, the compact TSSOP, SSOP, and more recently BGA designs are used.

Variants

Usually, the position designation is extended by a number indicating the number of pins (eg: " SO8 "). The variety of types ranging from " SO4 " to " SO64 ".

Housing dimensions

The picture shows a SO IC with dimensions, the values ​​are given in the table. All figures in mm.

C distance between the component body and PCB H Total height T pin height L component length Lw pin width Ll pin length P pitch Wb housing width Wl - component total width O overhang

SOP

After SOIC followed a family smaller types Small Outline Package (SOP ), with a pin spacing of about 0.65 mm:

  • Plastic Small - Outline Package ( PSOP )
  • Thin Small - Outline Package ( TSOP )
  • Shrink Small - Outline Package ( SSOP )
  • Thin Shrink Small Outline Package ( TSSOP )
  • Quarter -size Small Outline Package ( QSOP )

The ICs DRAM memory modules were usually TSOP until this design was replaced by the so-called ball grid array (BGA ).

JEDEC
734764
de