Phase-locked loop

A phase locked loop, also referred to as English phase-locked loop (PLL) is an electronic circuit arrangement so influences the phase position and related to the frequency of a variable oscillator via a closed control loop such that the phase deviation between an external reference signal and the oscillator, or a derived signal is constant.

Applications is the PLL in the message, control and measurement technology, such as the realization of filters, modulation and demodulation, in digital communication systems for clock recovery and synchronization.

• 3.1 Advantages
• 3.2 disadvantages

• 4.1 PLL as a tracking filter
• 4.2 PLL as demodulator and modulator
• 4.3 Frequency Synthesis
• 4.4 Communications Engineering, Metrology
• 4.5 clock recovery
• 4.6 Energy Technology

History

The first mention of analog phase-locked loops can be found in British works from the early 1920s. The circuits were implemented with vacuum tubes and were used in subsequent years as a circuit part in the then-emerging wireless technology and have been used, among others, in superheterodyne receivers. Objective was to minimize the necessary tuning circuits and their stabilization in operation.

Important work on the basics, starting from the theory of feedback amplifiers, delivered in the 1930s, the work of Hendrik Wade Bode with the Bode diagram and Harry Nyquist stability criterion with the Nyquist. Based on phase-locked loops have been increasingly used in control theory to the control of actuators such as servo motors. In the early 1950s, phase-locked loops were used for horizontal synchronization of televisions and first phase locked loops have been used in the context of frequency demodulation to receive the emerging FM radio programs. This was followed by applications in the field of television technology, especially in the field of color television by the NTSC television standard.

The mid-1960s, a strong spread of the PLL in the field of consumer electronics such as the radio and television equipment. The in the beginning discretely realized analog control loops were increasingly combined in integrated circuits (IC ) and offered by companies such as Signetics as finished components. It developed in the electronics sector popular phase-locked loops, such as that developed by RCA PLL circuit designated CD4046. This project, realized in CMOS technology IC rather widespread and is also offered in the year 2010 by various suppliers.

In the early 1980s, the first digital phase locked loops have been developed which are essential to the field of digital signal processing and the associated synchronization of transmitter and receiver devices. Phase locked loops are also variously modified in the structure, as for example, illustrating the Costas loop for demodulating the digital broadcasts.

Construction

The simplest form of a PLL consists of three components, which are combined in a control loop and thus influence each other:

In the steady state is obtained with this arrangement, tracking of oscillator frequency and phase relative to the supplied reference signal. Depending on the application, either the error signal, E (s ), the control signal C (s), or directly the vibration generated by the controlled oscillator is considered to be the output of the PLL. The three basic components are variously selected depending on the application, and determining the dynamic performance of the control loop. The loop attempts, determined by the negative feedback at the phase detector to keep when the incoming signal by re-adjustment of the oscillator, the error signal as small as possible and close to the value 0.

As a phase detector are used in analog PLLs analog multiplier used, which have in the region of small error values ​​in E (s ) close to the value 0, an approximately linear transmission behavior. In digital PLLs, XOR gate, or sequential logic circuits in the form of flip-flops are used. The nature of the phase detector determines among other things the so-called stopping behavior of the PLL.

In a PLL transmitter is operated FM modulated, still has to be considered that the PLL, the AF information item ( the stroke ) is supplied, so that it takes into account the AF in the frequency adjustment. Because the FM modulation causes a deviation from the desired frequency, so that the PLL tries to compensate for this. By supplying the NF in the PLL, these unwanted frequency deviation is taken into account and not compensated.

Order of a PLL

The linear loop filter constitutes a low-pass filter whose transfer function F (s) determines the dynamic characteristics of the PLL significantly. The loop filter determines what type responds to the control loop to deviations. The transfer function of the open loop G (s) ( Sheet open-loop transfer function ) consists primarily of the VCO and the loop filter with a gain factor k:

From this, the transfer function of the closed-loop H (s) (English closed-loop transfer function ) can be expressed as:

It follows that the order of H (s), and thus the order of a PLL, always one greater than the filter order of the loop filter F (s) is.

In a PLL of the first order, the error signal e ( s ) is fed directly to the controlled oscillator as a special feature, so it is E ( s) = k · C (s ) with any constant factor K, which expresses only one amplification or attenuation.

In a PLL of the second order of the loop filter has the general transfer function F (s) with the first order:

And at a third order PLL:

Depending on the choice of the factors ai, which zeros the, and bi, which determine the pole, the dynamic control properties are described. Grinding at a constant first-order phase error is unavoidable if the input frequency is constant, in addition to the inherent frequency of the oscillator. This deviation can be reduced k only increasing the gain, which can lead to stability problems. For this reason, the second-order phase-locked loops are often used: the phase error to disappear asymptotically when the frequency at the input remains constant. Following the nomenclature of control engineering, the parameters ω as the angular frequency and damping factor ζ denotes. In third-order PLLs, the phase error disappears at a constant chirp rate.

In the literature sources given below the various types of PLLs are classified depending on the order and within a order in different types and tabulated.

Operating ranges

The deviation of the input frequency of the generated by the controllable oscillator frequency fc describes various operation regions of a PLL, which is essential for the behavior of the control loop. It is made between the engaged operating range (English lock) the PLL is in the stable control behavior, the snapping behavior, where the control loop may be excreted in the locked steady state, and distinguished the non-locked, free-running mode.

The adjacent graph shows the four main operating areas are given, and the deviation of the input frequency is symbolized by a horizontal symmetric deviation from the central local frequency fc. The exact values ​​will depend on the nature of the phase detector and the loop filter. The areas mean:

Is outside the holding area before the unstable free-running mode, in which neither an engagement nor a hold of a previously performed latched operation is possible.

Digital PLL

Phase locked loop DPLL able to within the digital signal processor, abbreviated as so-called digital PLL can be realized. What is essential is the transition from a continuous-time system to a discrete-time system, and the place of the continuous Laplace transform for analysis takes the discrete z-transform. One advantage of DPLLs is to facilitate reproducibility.

The classification, from the extent to which a PLL can be seen as DPLL, is not uniform in the literature. Thus, only a part of the PLL, for example, only the loop filter may be realized as a digital filter. Typically, the design methods of an analog PLL can be used as a basis for the DPLL. At All- DPLLs the complete control loop including NCO is built in digital circuits.

So-called software PLLs realize the control loop as a sequential program in a digital signal processor and often find application at low frequencies, are also among the field of DPLLs. Software PLLs for complex phase detectors are used based on the Hilbert transformation.

Differences to other oscillator designs

Benefits

• Although the generated frequency can be varied ( in steps), it has the same relative ( long term) such as stability of the crystal oscillator and other oscillators exceeds a variable frequency by far. In particular, the temperature dependence can usually be neglected.
• The division ratio can be changed very quickly in order to change the frequency; Application in radio scanners and receivers World
• The division ratio may be transmitted digitally, and allows a remote control transmitters and receivers.

Disadvantages

• The increased phase noise limits the sensitivity of receivers.
• Increased technical complexity compared to other oscillator circuits.

Applications

PLLs include a wide range of applications and in the following section some applications are described as an example.

PLL as a tracking filter

Looking at the frequency and phase of the reference signal as an input variable and the oscillator signal as an output, as the described arrangement behaves like an electrical band-pass, wherein said transfer characteristics are determined by the dimensioning of the loop filter substantially. Of particular importance in the use of the PLL as a band -pass filter is the fact that this is an automatic tracking of the frequency of the input signal. At the same time it is possible to realize very small Nachführbandbreiten in this arrangement. It is therefore ideally placed to add regeneration of noisy signals of varying frequency.

PLL as demodulator and modulator

To the reference signal as an input variable and the oscillator control voltage as an output is suitable for use as the PLL FM demodulator as long as the modulation frequency is less than the Nachführbandbreite. The filtering action of the PLL as described above is preserved, so that extremely disturbed signals can still be demodulated.

If one uses the output voltage of the phase detector as a starting signal, the PLL can be used as a demodulator for phase-modulated signals. In this case, the Nachführbandbreite must be selected to be smaller than the lowest modulation frequency. PLL -based phase demodulators have gained great importance in satellite communications.

Similar to the functions as a demodulator allows the PLL as AM and FM modulator use.

Frequency synthesis

An application of the PLL frequency synthesis. The picture shows a block diagram of a PLL-based frequency synthesizer. A VCO (Voltage Controlled Oscillator) to generate the output signal. In the feedback path of the PLL, a frequency divider is provided which divides down the VCO frequency prior to the phase detector by an adjustable factor. The reference signal of the PLL is typically provided by an accurate and stable crystal oscillator.

In the locked state, the VCO is adjusted to a frequency that is greater than the divisor, the frequency of the reference signal. By changing the divisor thus the frequency of the VCO can be exactly integer multiples of the reference frequency set. An important aspect of this is that the accuracy and stability of the fixed reference frequency also apply to the adjustable output frequency.

The described arrangement can be set up with the components available today at low cost in a small space and is used for example in mobile phones, radios, television tuners and radio equipment, extensive application. Typical output frequencies are here at a few hundred MHz, typical reference frequencies at 100 kHz. Frequency divider and the phase detector are generally realized in an integrated circuit, while the VCO and the loop filter are often constructed discretely.

Important aspects when designing a PLL frequency synthesizer are the spectral purity of the output signal, the frequency resolution and the lock-in time required for a change in frequency. The spectral purity is essentially determined by the properties of the VCO, but also on the noise properties of the other components as well as a convenient construction (shielding, filtering). The constant readjustment of the VCO frequency produces a phase noise is typically -80 dBc (see picture), and adversely affect the sensitivity of heterodyne receivers can. The phase noise of oscillators is significantly lower and the other is at -140 dBc at an interval of 10 kHz.

The frequency resolution is the system described above, the same as the reference frequency. The lock time depends largely on the control bandwidth, which is not arbitrary, but in terms of the used reference frequency and the spectral purity of the output signal needs to be optimized. When dimensioning of practical systems shows that a high frequency resolution is on the spectral purity and a short lock time contrary to the claims.

This contradiction is by using a frequency divider for dividing the VCO frequency by fractional factors, dissolvable. To this end, the partial factor must be varied in time so that there is an average of the desired fractional setting. At the output of the phase detector, however, this results in a disturbance variable, which must be compensated or filtered with appropriate counter-measures in order not to degrade the existing phase modulation on ( the delta-sigma method ). With thus constructed PLL synthesizers can be arbitrarily fine frequency resolution at the same time realize shortest Einrastzeiten and very high spectral purity.

Communications technology, measurement technology

PLLs are suitable for the generation of stable frequencies up to the GHz range ( wireless technology ), generation of programmable frequencies produce high-frequency clocks for computer and synthesizer tuner, because with the help of this circuitry a very precise dialing or control of frequencies is possible. On the one hand it is possible to generate a fixed frequency reference ( crystal oscillator ), and a variable feedback frequency divider accurate output frequency, corresponding to said synthesizer principle. On the other hand, one can multiply a variable frequency by means of a permanently set feedback frequency divider with a fixed factor.

In addition to the application as a frequency synthesizer PLL circuits are mainly used for the demodulation of frequency-or phase-modulated signals for clock synchronization and clock recovery.

Depending on the application for which the PLL is used is also different, where the output signal is tapped. The frequency of the oscillator is for example used in frequency modulators, for use as an FM signal demodulator, the tuning of the VCO.

Clock recovery

Some of the data streams, in particular serial synchronous data streams ( such as the data stream of the magnetic read head of a hard disk), are transmitted without separate clock signal and read out from the storage medium. For clock recovery from the received signal, a special line coding of the data to be transmitted is necessary, as is, for example, the Manchester code.

Clock synchronization: If a clock has been parallel with the stream of data sent, it must be reprocessed before it can be used for processing the data. However, this takes some time, so that clock and data are out of sync with each other first. The PLL ensures that the recycled, and the original clock pulse ( and thus the data ) are reproduced synchronously.

Energy Technology

A PLL is also used to recover for active systems for power factor correction, the phase position from the phase voltages. With the aid of a phase angle control can be carried out, which ensures that the phase currents have the same phase as the phase voltages. Thus, the fundamental power factor can be brought to values ​​just below 1 and the line network is not burdened with reactive power.

Extensions

A delay locked loop (DLL) is similar to a PLL, but has no separate oscillator and instead operates with an adjustable delay element. In the field of digital frequency synthesis, the element of the Direct Digital Synthesis (DDS) plays a role, which finds use as NCO in the context of a digital PLL. The Frequency Locked Loop (FLL) has a modified discriminator and is counted in the literature for the group of the PLLs.