Thermal oxidation
Thermal oxidation of silicon in the semiconductor art, a coating process in which on a silicon monocrystalline substrate (e.g. a silicon wafer), a thin layer of amorphous silica is deposited. It is used inter alia in the manufacture of microelectronic circuits. The coating process is based on a chemical reaction of oxygen and silicon, at temperatures above 1100 ° C. With very short process times is called the method also " Rapid Thermal Oxidation " (RTO, dt: rapid thermal oxidation), which is used to generate very thin oxide layers (<2 nm). A similar process is the generation of a thermal silicon nitride layer on a silicon substrate at high temperatures.
- 6.1 Material Selective masking for diffusion doping
- 6.2 Surface passivation
- 6.3 device isolation
- 6.4 Modern MOS transistors
- 6.5 polysilicon and metal silicides
Process Description
The oxidation of silicon to silicon dioxide is a diffusion- dependent solid-state reaction. You already runs at room temperature under laboratory conditions ( water is needed ) from the reaction rate, however, is far below the requirements for technical / industrial processes. In addition, usually formed by the diffusion limitation only about two nanometers natural oxide layer.
For the oxidation of silicon, a distinction is essentially two methods: the dry and the wet oxidation. Additionally, there is a smaller number of similar variations such as H2 O2 combustion. The oxidation process of all types can be grouped into three steps: ( i) transport of the gaseous starting substances (e.g. oxygen or water) to the surface of the substrate, (ii) diffusion through the existing oxide layer, and (iii) the oxidation reaction itself When reactive oxygen is incorporated into the silicon substrate, that is, in this process, no coating layer in the strict sense is applied to a substrate, but the substrate is converted to the surface. In contrast to a coating, a part of the subsequent layer is in the range of the previous silicon substrate. The silicon is as it were "consumed". The resulting oxide layer is in thermal oxide to about 46% below and 54% above the starting substrate of silicon.
The growth rates and layer properties (density, dielectric strength, etc.), the two main methods for partial differ greatly. Common to both methods is that first doping concentrations above 10-6 (corresponding to about 6 × 1018 atoms 1023 silicon atoms, see Avogadro's constant) promote oxidation, and secondly, that the oxidation depends on the crystal orientation, wherein the oxidation of { 111} silicon surfaces to 30-100% is faster than that of {100} silicon surfaces (figures {111} or {100} crystal faces and designate certain areas of the unit cell, see Miller indices and diamond structure).
Before the oxidation takes place, as with any high-temperature process in semiconductor technology, a wafer cleaning. This serves both to improve the process itself as well as the prevention of a tube contamination. With cleaning, especially metal impurities should be reduced, that would otherwise degrade the electrical properties of the oxide layers. A typical purification process is the 2 RCA cleaning, the hydrochloric (HCl) used for the bonding of metallic impurities. HCl is also used to clean the stove pipes, but nowadays often organic chlorine compounds such as 1,2- dichloroethene (DCE ) are used for this purpose.
Dry oxidation
The reaction can be significantly accelerated by high temperatures. At the temperatures usual for this purpose between 800 and 1200 ° C the silicon oxidized already when exposing it to oxygen. This process, wherein the oxidation is caused only by oxygen, also called dry oxidation. The layer thickness achieved is dependent on the temperature and oxidation time.
Wet oxidation
Another method makes use of water vapor as the oxidizing agent, it is, therefore, wet oxidation ( also wet oxidation ) mentioned. To flow through a carrier gas, often, oxygen or an oxygen -nitrogen mixture before it is introduced into the oxidation furnace, a warm at 90-95 ° C deionized water -filled container ( the so-called bubbler ). Transported by the carrier gas, water molecules then react with the silicon surface:
The oxidation reaction takes place usually at temperatures between 900 ° C and 1100 ° C.
Further process variants
In addition to thermal oxidation with pure oxygen or water vapor, there are other methods in which the actual reaction partners can be formed for the oxidation of silicon just by a reaction in the process chamber, for example hydrogen (H2) and oxygen (O2), trichloroacetic acid (TCA ) and oxygen or hydrogen chloride (HCl) and oxygen. These are rarely used in practice, but offer some of better coating properties.
H2 - O2 combustion: In the H2 - O2 combustion (English pyrogenic oxidation ), water is formed directly in the reaction chamber by the reaction of high-purity hydrogen and oxygen at about 600 ° C. For this purpose, the two source gases (mostly together with nitrogen) passed through separate feed lines into the process chamber. It must be paid particular attention to the mixing ratio, as they may explode by detonating gas formation. The actual oxidation process corresponds to the wet oxidation, reacts with the silicon to silicon dioxide with water. The H2 O2 combustion oxide layers with a high growth rate, but low level of impurities and defects can be produced.
Deal- Grove model
The Deal- Grove model is a commonly used description for the diffusion- based layer growth of thermal silicon dioxide on a pure silicon surface. Necessary for the oxidation process time, t, which is necessary to achieve a given layer thickness dSiO2, therefore, is calculated as follows:
Where B is the parabolic and the factor B / A indicates the linear growth rate.
For a silicon substrate that already has a layer of oxide, the equation by a term must be added τ. τ denotes the time that would be necessary in order to produce the already existing layer by the current process parameters.
The constant can also be used to account for the non-writable to deal with the groove - top model rapid growth in the dry oxidation process to calculate the duration.
Solving the quadratic equation for dSiO2, we obtain:
For thin oxide layers less than 30 nm, the Deal- Grove model is not suitable, since the oxide initially grows faster than expected. In addition, often shows a delay time until the oxidation process starts. This time is longer than the time it takes to replace the volume of gas in the oxidation furnace.
For the modeling of the growth of very thin oxide layers of different approaches are being pursued in the literature. A frequently used approach is based on the expansion of the Deal- Grove model to an additional term, which can be described at the beginning of the film growth, the growth rate (for example ). Another approach is the introduction of a transitional layer between silicon and silicon dioxide. Unlike in the deal Grove model assuming an abrupt transition from Si to SiO 2, it is believed that during this transition layer unstöchiometrischem silica ( sio0 < x <2 ) having a thickness of 1.5 nm to 2 nm occurs, the oxidation reaction. The presence of such a transition layer could be experimentally confirmed in XPS measurements.
Oxidation techniques and equipment
Most frequently, thermal oxidation is carried out in the heating furnace at temperatures between 800 ° C and 1200 ° C. A single oven takes on a plurality of wafers (25 to 200) in a horde usually. There are two basic furnace designs, in the manner as the wafers to be stored are different: horizontal and vertical furnaces. The horizontal design is mainly used in older or in systems for wafers with diameters of 150 mm and smaller. Vertical ovens are used frequently, however, newer systems for wafers with a diameter of 200 mm and 300 mm.
For horizontal furnaces, the wafers are side by side. Falling down dust can thus pass between the wafers, so ultimately pollute each wafer. Horizontal furnaces typically use a convection current within the oxidation tube, the result is that it is down in the reaction chamber colder than the above, and thus the oxide layers grow more slowly on the downward facing side of the wafer; non-uniform layer thicknesses are the result. This is the case of larger wafers (diameter greater than 150 mm), as they are now used by default, and the increased demands on the manufacturing tolerances are no longer acceptable. One advantage of horizontal furnaces is that several stove pipes above the other can be placed in a facility, which saves some space in the clean room.
In vertical furnaces, the wafers are superimposed lying. By this arrangement of falling dust can fall only on the top-ranked wafer; Dust contamination are minimized or prevented. By the horizontal storage a more uniform temperature distribution and thus a uniform film thickness is achieved on the single wafer. Due to the different temperature distribution in the furnace tube, the wafer is mounted below a thinner layer than the upper; Also, there are minimal differences between the top and bottom of a wafer. These problems can be reduced, where you countercurrent to the gas stream to the convective flow from top to bottom.
Layer properties
Prepared by dry or wet oxidation Sliziumdioxidschichten are glassy and has only a short-range order (→ amorphous). Their properties are almost identical to those of quartz glass, which is usually used as a material for the oxidation pipe. Furthermore, not all of the bond between the silicon and oxygen completely formed, the result is unbound, charged oxygen atoms. The molecular structure is unlike most of crystalline silica (quartz), including with respect to their density ( ≈ 2.2 g · cm - 3 instead of 2.65 g · cm -3 for quartz) and its modulus of elasticity (87 GPa instead of 107 GPa for quartz).
As with other coating methods and vary the properties of silicon dioxide, produced by thermal oxidation, as a function of the process conditions. The main factors here are the oxidation process (dry or wet ), and the process temperature. In terms of performance and reliability of microelectronic devices and circuits, especially the electrical properties of thermal oxides are important, such as electrical conductivity, charge trapping (English carrier trapping ) and existing oxide charges.
In the manufacture of thick oxide, the wet oxidation because of the higher growth rate compared to the dry oxidation is preferred. A disadvantage of the wet oxidation are the poorer layer properties (especially the electrical ). Due to the higher growth rate of more free bonds ( dangling bonds Sheet ) at the interface to silicon, and also generated in the layer itself; in this context is also spoken by a higher defect density. These dangling bonds act as impurities or scattering centers for electrons and permit, inter alia, a leakage current along the interface and cause a lower dielectric strength.
In contrast, layers were prepared by dry oxidation, to improve coating characteristics. However, the slow growth rate has a negative effect on the process costs. In practice, there will therefore be more processes that combine both methods, so-called dry -wet -dry cycles. Here, the rapid growth layer of the wet oxidation is used to keep the processing time low. By producing high quality boundary layers with the dry oxidation at the beginning and end of the negative characteristics of the wet oxidation can be largely eliminated.
Segregation
As already mentioned, silicon is consumed during oxide growth. Because foreign materials have different solubilities in silicon and silicon oxide, this can either be incorporated into the oxide film or the silicon and remain in the boundary layer. Depending on the solubility, it may therefore be an accumulation () or a depletion () of impurities in the silicon at the interface are the oxide; calls this separation is also segregation. For the evaluation of this process, the so-called segregation coefficient k authoritative. Thus, the pro rata distribution of the impurity atoms in the oxide and in the silicon can be determined.
Application
The thermal oxidation of silicon since the mid- 1950s, when the first transistors were fabricated on silicon-based commercially, one of the most important processes in the manufacture of microelectronic circuits. At that time, silicon germanium sat down opposite the preferred material in semiconductor technology through. The main reason for this development included the superior material properties of silica compared to germanium, which had poorer adhesion properties and is not stable against water.
The process of thermal oxidation of silicon was found by chance in the 1950s at Bell Telephone Laboratories in New Jersey, where in 1947 the first working transistor was discovered - but there were also other industrial research laboratories, and universities. At that time, the doping of semiconductors by diffusion of gaseous dopants (boron, phosphorus, arsenic, antimony) was already known. The processes are carried out at high temperatures of around 1000 ° C. Accidentally mixed in 1955 Carl Frog hydrogen and oxygen in the diffusion tube. After the silicon samples were removed from the oven, they showed discoloration to a bright green. It turned out that a stable thin layer of thermal silicon dioxide formed.
Important areas where thermally produced silicon dioxide is used and in part still are, the selective doping mask, the surface passivation of silicon, and the electrical insulation of the components in the planar. In the manufacture of modern ICs, this technique is however only used in the initial process steps, for example in the preparation of grave isolation or Gatoxiden that the gate is separated in the CMOS transistors from the silicon to below to be formed by the resulting electrical field to the conductive channel. Main reason that this method is not used at a later stage of the manufacturing process, the high process temperature. This example result in the displacement of doping profiles. For this and other reasons such as chemical vapor deposition ( reaction with TEOS at 600 ° C) or (rarely ) the sputter deposition in all other areas and manufacturing sections (isolation of the interconnects, etc.) "Low temperature method " used. Although these produce a lower quality oxide, but are also suitable for producing coatings on materials other than silicon.
Material Selective masking for diffusion doping
The ability of silica to be a material selective masking for the diffusion of dopants in silicon, was first introduced in 1956 by Bell Labs employees frog and Derick. They discovered that the diffusion of n-type dopant ( P, As, Sb) is not obstructed in the silicon at temperatures in excess of 1000 ° C in an oxidizing atmosphere. The same applies to the p -type dopant boron, but in contrast to the aforementioned n- type dopants, boron may diffuse more rapidly in the presence of hydrogen and water vapor through the oxide and the silicon. Practical application found the technique of selective masking among others in the manufacture of double diffused transistor or the so-called Mesatransistors because he allowed it to manufacture the contact of the emitter and base to a surface.
Surface passivation
The characteristics of the transistors were unforeseeable at the time of their exposed surface and not stable. For this reason, employed in the period 1955-1960, a number of research laboratories with the surface passivation of germanium and silicon. An important work group conducted research at Bell Laboratories, Martin M. Atalla and coworkers found that a special cleaning and subsequent production of a thin thermal oxide (15-30 nm) produced a significant reduction of leakage current in pn junctions with it. The cause lay in the binding and neutralization of surface states. This allowed later, to control the carrier mobility by an external electric field (see MOSFET). The passivation enabled later another important development, especially noteworthy are the planar process and the Planardiffusionstransitor and based on integrated circuits.
The thermal oxidation is also today still used for surface passivation of single crystal and polycrystalline silicon layers. The method is not limited to the production of microelectronic components, but can be used in almost all areas that use silicon for " electrical applications ," such as solar cells or microsystems.
Device isolation
The components (transistors, diodes) of an integrated circuit are generally on the surface of a wafer. In the early years of microelectronics she initially considered sufficiently far apart and the insulation of the components (prevention of leakage currents, etc.) have been realized by reversely biased pn junctions. However, in the early 1970s increased the performance requirements of the circuits and the packing density of the components was progressively increased. The insulation by pn junctions was insufficient. Your place took a particularly Oxidisolationen that were prepared by the LOCOS process or similar processes. Through them the capacity and leakage currents between the components could be minimized, in addition, they allowed a higher packing density and thus saved space on the wafer. When LOCOS process silicon only in selected areas ( locally ) is oxidized. The non- oxidized regions are masked with a material that blocks required for the thermal oxidation, diffusion of oxygen and water, such as silicon nitride; The structuring of the whole area deposited masking layer is photolithographically. However, due to diffusion under the mask layer from the side, this method can not have sharp boundaries but only layer transitions create (see " bird's beak " in LOCOS process ).
In the 1990s, these " LOCOS techniques " were by the grave insulation ( engl. shallow trench isolation STI) replaced. This was due to the increased demands on the packing density and the planarity of the surface, especially for the photolithographic patterning in subsequent process steps. The LOCOS techniques had by way of the oxide growth during the thermal oxidation ( a bird's beak, etc.) decisive disadvantages and further developments of the process, the minimized these shortcomings have been too complicated and thus expensive.
However, the thermal oxidation is used in the isolation of the current IC manufacture. It is used for example in the grave insulation as part of the process for forming a thin oxide layer with good electrical properties, which are not achieved by TEOS and HDP oxide (HDP stands for high density plasma English, German high-density plasma ). Furthermore, there are methods for the production of silicon-on -insulator wafers ( SOI wafers ) in which firstly a thermal oxide on a wafer and later connected to a further wafer (wafer bonding).
Modern MOS transistors
The insulating layers produced by the thermal oxidation of silicon had a decisive influence on the realization of the first field effect insulated gate transistors ( IGFET ). The principle of field-effect transistors has been described in the late 1920s by scientists such as JE Lilienfeld and O. Heil. Because at that time not yet existing manufacturing processes that provide enough pure semiconductor crystals or insulating layers, these ideas could then not be realized in practice. In June 1960, the Bell Labs employees Dawon Kahng and Martin M. Atalla, first published in a functioning MOSFET (English metal-oxide -semiconductor field -effect transistor, German metal - oxide - semiconductor field-effect transistor).
A MOSFET is comprised of a thin layer of thermal silicon dioxide produced on a p- or n- doped silicon and a metal film ( later, doped polycrystalline silicon) over the oxide layer, the gate electrode. This metal-insulator- semiconductor capacitor is an important part of the field effect transistor, because of the gate voltage, electrons or holes may be accumulated on the silicon - silicon dioxide interface, so that a conductive channel between the source and drain electrode forms. However, the first MOSFETs were poorly reproducible electrical properties and ran partially unstable. Despite the efforts of numerous companies the cause of these effects was found in 1965 by employees of Fairchild Semiconductor. Sodium impurities (more specifically positively charged sodium ions) in the oxide and at the interface influenced by the threshold voltage, and thus the electrical performance of transistors. After the identification of the source of alkali metal ions as much time and effort instability was concentrated to analyzing these ionic contaminants to be removed and to control. These include so-called CV measurements ( capacitance-voltage measurements), which allow to draw conclusions on possible charges. Numerous procedures for the binding of the ions ( gettering ) or of the protective mask has been developed.
Even today (2009) is thermally generated silicon dioxide used by most manufacturers as a gate material. The layer thicknesses are doing now in the range 1-3 nanometers and are prepared by rapid thermal oxidation. At these small layer thicknesses, however, the losses increase by tunneling currents. A switch to gate materials with a higher dielectric constant than silicon dioxide ( high-k dielectric). In this way the thickness of the insulation layer can be increased again, and therefore the loss may be reduced by tunnel currents.
Polysilicon and metal silicides
In addition to the oxidation of single crystal silicon to be in the semi-conductor technology similar procedures also for the thermal oxidation of polysilicon and metal silicides, such as tungsten disilicide ( WSi2 ), Kobaldsilizid ( CoSi 2 ), are used.
The process of thermal oxidation of polysilicon is identical to the single crystals of silicon substantially. The polycrystalline structure in the oxidation can not be distinguished between different crystal orientations, and the process is influenced by the thickness of the polysilicon film itself as well as by the size of polysilicon grains. The oxidation rate of undoped polysilicon are generally intermediate between those of the {100} - and {111} - oriented silicon single crystals. In most applications, however, the polysilicon layers are heavily doped prior to oxidation, which changes the oxidation kinetics. In the case of heavily p -doped polysilicon oxidation rates are significantly higher; This enhanced effect is due to impurities in the silicon single crystals, and smaller than at a low process temperature (< 1000 ° C) the most. Is applied, the thermal oxidation of polysilicon, inter alia, in the electrical insulation of different polysilicon layers, as are used in a variety of VLSI applications, such as dynamic RAM, removable programmable memories (EPROM), charge coupled devices ( CCDs) or switched capacitor circuits.
Metal silicides are used in semiconductor technology because of its high electrical conductivity for contacting the doped silicon regions (e.g., source and drain contact ), and polysilicon (e.g., gate ). The oxidation of metal silicides can be used for example in the MOSFET for the electrical insulation of the gate electrode opposite to subsequent layers. The oxidation of the metal silicide is converted into silicon dioxide. The growth kinetics of the SiO2 layer depends analog self-determined for the oxidation of silicon from Stoffantransport and diffusion of the oxidant (O2 or H2O ) and the reaction. For the preparation of well insulating, that is metal ion- free, oxide is sufficiently high to ensure supply of the interface silicon / metal silicide with the silicon.