Cyrix III

  • Joshua
  • Samuel

The VIA Cyrix III is an x86 processor for Socket 370 VIA Technologies.

Originally, a real Cyrix processor appear under the name VIA Cyrix III in early 2000. This CPU had been so long in development that she had received three different code names: Originally started developing under the name " Cayenne ", as Cyrix was still independent. After the merger with National Semiconductor, the code name was changed to " Gobi ". But in the two years of belonging to NS could not be completed, the CPU. Only after the takeover by VIA CPU under the code name "Joshua" was completed.

Due to the long development time could actually expect a mature product, but the VIA Cyrix III a very interesting CPU for Socket 370 Originally nor for the performance segment was only on paper planned, he had already because of the long delay to competitors for be rescheduled Intel's low -cost Celeron CPU. Featuring an improved FPU, 256 KiB L2 cache and 133 MHz FSB Celeron should really be an easy opponent, and Joshua would have to be clearly superior.

However, the Joshua disappointed in the first preliminary tests: instabilities, high heat and very low clock rates associated with completely utopian P's ratings ( as much too high ) meant that VIA the Joshua design completely abandoned and instead the Samuel developed by Centaur Technology as "VIA Cyrix III " sold.

This Samuel processor was launched in mid-2000 on the market and was basically a ported onto the base 370 WinChip 3 with higher clock rates and improved production technology. Because of the lack of L2 cache ( at the WinChip series of L2 cache was like the Socket 7 standard on the motherboard, which did not exist at the base 370), the CPU was not really competitive and is probably more than the first attempt to walk from VIA seen on the CPU market.

The successor Samuel 2 was then sold under the name VIA C3.

Model data

Joshua

  • Cyrix design
  • Codename: initially " Cayenne ", after the takeover by National Semiconductor " Gobi ", after the takeover by VIA Technologies "Joshua"
  • L1 cache: 64 KiB (unified )
  • L2 cache: 256 KiB with processor clock
  • MMX, 3DNow!
  • Socket 370, GTL 100 to 133 MHz Front Side Bus
  • Operation voltage ( Vcore ): 2.2V
  • Release Date: February, 2000
  • Manufacturing Technology: 0.18 micron TSMC
  • The Size: unknown, 22.0 million transistors
  • Clock rates: 350 MHz to 450 MHz PR433: 350 MHz (100 MHz FSB)
  • PR466: 366 MHz (122 MHz FSB)
  • PR500: 400 MHz ( 133 MHz FSB)
  • PR533: 433 MHz ( 124 MHz FSB)
  • PR533: 450 MHz (100 MHz FSB)

Samuel

  • Centaur design
  • Codename: C5A
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: No
  • MMX, 3DNow!, LongHaul!
  • Side Socket 370, GTL with 100 and 133 MHz front bus
  • Operation voltage ( Vcore ): 1.90 V or 2.00 V
  • Power consumption ( TDP): about 7 W to 10 W
  • Release Date: June, 2000
  • Manufacturing Technology: 0.18 micron TSMC
  • The size: 75 mm ² with 11.3 million transistors
  • Clock rates: 500, 550, 600, 650, 667, 700 and 733 MHz
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