The Pentium Pro is a microprocessor company Intel. He comes from the x86-/IA-32-Architektur and is for 32 -bit code optimized. Since it was expensive and at the then widespread 16- bit applications and operating systems (eg Windows 3.1x ) had not performed well, it sold considerably worse than hoped for by Intel. It was mainly built in expensive servers and workstation systems. Among the 32- bit operating systems used on these systems ( such as Windows NT or OS / 2 ) reached the Pentium Pro has a significantly higher performance than an equivalent Pentium processor. For this purpose also operated with internal processor speed L2 cache was responsible. In the role of high-end processor, he was later replaced by the Xeon processor line.
Actually, the Pentium Pro was supposed to replace the Pentium after 1995. However, since the production had a high rejection rate (there were particular problems with the on-chip cache ), Intel could not reduce as far as the price that the Pentium Pro was a wide distribution. Instead, finally, the Pentium II was developed as a Pentium successor. In this processor core and the cache are separated.
Currently experiencing the Pentium Pro, especially at internet auction portals, an increased level of attention. Because of its substantial gold share large amounts on its recycling properties are also available. The required results of sales proceeds are directed this is usually after the gold current price.
Contrary to what its name suggests, the architecture of the Pentium Pro differs significantly from that of the previous Pentium processor. The Pentium Pro contained some important new concepts, such as a RISC core. So he was not a pure CISC processor anymore, but rather a kind of hybrid. In addition, a concept with the " out-of- order execution " was introduced, which enhanced the performance potential. Whereas the Pentium processor core executing native code x86, Pentium Pro processor core comprises three parallel -working RISC pipeline, the translating means of three decoder units underlying x86 code into RISC instructions. This so- processor internally modified program code can be efficiently distributed to the pipelines, which allows better parallelism of the command execution. The core of the Pentium Pro is the P6 processor core, which then in Pentium II, Pentium III, Pentium M, and finally in the latest Intel Core architecture is used later in a modified form. The P6 architecture that lays the foundation for the 686er classification, the most important step in the development of x86 processors since the introduction of the 386ers as a 32- bit CPU with MMU his was.
The 2nd- level cache ( L2 cache ) and processor core are in the same processor housing on two ( or three at 1024 KiB model) This separate, connected by bonding wires. There are versions with 256, 512 and 1,024 KiB L2 cache. The available exclusively for Socket 8 processor was produced with the clock frequencies 150, 166, 180 and 200 MHz.
The processor accesses a GTL bus to the memory and other system components. It is possible to operate without any additional components of the four processors to a processor bus. For more processors bridge modules and other tricks are needed. Such servers presented among other HP ( Netserver LX Pro 8 ) and ALR ago (Revolution 6x6). This was the Pentium Pro, the first real server processor from Intel.
The Pentium Pro Family and an overdrive processor that was specified at 300/60 or 333/66 MHz further received. This was from the core, a Pentium II with 512 KiB L2 cache, which is also, and ran unlike the Pentium II, with full processor speed. This overdrive processors were only approved for dual-processor systems from the manufacturer as a maximum of two processors to be used with the Pentium 2.
P6 ( A80521 )
- L1 cache: 8 8 KiB ( Data Instructions )
- L2 cache at full CPU clock: 256 KiB L2 cache (all clock frequencies other than 166 MHz)
- 512 KiB L2 cache (166 and 200 MHz)
- 1024 KiB L2 cache ( 200 MHz)
- 0.50 microns: 306 mm ² at 5.5 million transistors
- 0.35 microns: 196 mm ² at 5.5 million transistors
- 0.50 microns / 256 KiB L2 - Cache: 202 mm ² at 15.5 million transistors
- 0.35 micron / 512 KiB L2 - Cache: 242 mm ² 31.0 million transistors (both the duplicate values in 1024 KiB L2 cache )
- 256 KiB L2 - Cache, 66 MHz FSB: 133 MHz (engineering sample)
- 256 KiB L2 - Cache, 60 MHz FSB: 150 and 180 MHz
- 256 KiB L2 - Cache, 66 MHz FSB: 200 MHz
- 512 KiB L2 - Cache, 66 MHz FSB: 166 and 200 MHz
- 1024 KiB L2 - Cache, 66 MHz FSB: 200 MHz
Pentium II OverDrive for Pentium Pro P6T
- Introduction Date: August 24, 1998
- Introductory Price: $ 599
- Base 8
- Frequency (s): 300 MHz bus speed 5x 60 MHz
- 333 MHz bus speed 5x 66 MHz
- 512 KiB L2 cache
- Data bus: 64 bits
- Address bus: 36 bit
The Pentium II OverDrive CPU is based on a Deschutes core, but are incorrectly according to the CPUID instruction as from Klamath.