Pentium II

• Slot 1
• MMC-1/MMC-2
• Mini - Cartridge
• BGA
• μPGA

• Klamath
• Deschutes
• Tonga
• Dixon

Pentium II is an x86-compatible central processing unit ( CPU) of the manufacturer of the Intel family of processors P6.

• 3.1 Tonga ( 80523 )
• 3.2 Dixon ( 80524 )

History

The Pentium II core based on the Pentium Pro, but 16 -bit code could run much faster than the latter. He also dominated the introduced with the Pentium MMX MMX instruction set. Unlike its predecessor, the Pentium Pro are the Pentium II, the caches are not integrated on the processor die, rather than external cache modules soldered together with the processor core on a board, in a quite voluminous black plastic case ( SECC ) with a large hologram sticker and a printed white " Pentium II " lettering was housed, the Pentium II processor from all previous generations purely visual deposed. In a slightly modified form it was also introduced the first generation Pentium III ( Katmai ) use. For the administration of the L2 cache, an additional chip, the cache controller needs, also was on the circuit board along with the processor and the cache blocks. Instead of a socket for the processor it was by design requires a slot on the motherboard. This was referred to by Intel as slot 1. In him, the processor was edgewise inserted and locked with side bars. Compared to the Pentium Pro external cache modules were indeed a step backwards, but you so solved the problem of low chip yield the Pentium Pro. In this way it was possible Intel to acceptable for the mass market prices produce the Pentium II, despite the costs associated with the housing. Advances in semiconductor production made ​​these chosen for reasons of cost solution but soon obsolete, so that from the second revision of the Pentium III ( Coppermine ), the L2 cache processor die was back on the court and instead of a slot with insert card back to a traditional FC PGA design was changed with base.

The presented in May 1997, the first Pentium II " Klamath " ran at clock speeds of 233, 266 and 300 MHz and produced ( for that time ) a large amount of waste heat. This was caused by the 0.35 -micron manufacturing process, which required a core voltage of 2.8 volts. With a FSB of 66MHz they lagged behind the actual potential of the CPU design. Compared to the successors were the Klamath multipliers not hardwired ( curly ): For most processors, smaller multipliers so that a Pentium II 300 with 3 x 100 MHz (instead of 4.5 × 66 MHz) could use could run without him to overclock. On some models, the multiplier could be changed successfully upwards.

In January 1998, the Pentium II " Deschutes " with 333 MHz its premiere. It was manufactured in a 0.25 - micron process and needed only 2.0 volts core voltage, resulting in a much lower heat output. The support for a FSB of 100 MHz from the model with 350 MHz brought considerable performance gains. For the first time it was possible to drive to the L2 cache more than 512 MiB of RAM ( up to 4 GiB ). In the course of Pentium II processors were released with 350, 400 and 450 MHz. In order to make overclocking more difficult, with almost all the processors the multiplier was internally hardwired.

A special feature was the Deschutes processor series SL2W8 ( see picture above), who ran with only 66 MHz FSB and 300 MHz core clock. These processors developed in the overclockers scene quickly became a secret because many of them were equipped with the same cache blocks, which were also used in the 450 MHz Deschutes. Since each Deschutes core could be operated with 100 MHz FSB, in many cases it was possible to overclock the SL2W8 to over 450 MHz.

In addition to the Pentium II that a reduced-power version of the processor for the low-price segment was offered, the Intel Celeron. Main difference to a full Pentium II were changes to the L2 cache ( not even any and then 128 KiB) and the generally limited to 66 MHz FSB. The associated performance impact has been significant, what was the name of a bad reputation.

Together with the Pentium II, Intel introduced a matching chipsets as 440LX or 440BX who supported the AGP bus as fast, dedicated connection to the graphics card.

Desktop models

Klamath ( A80522 )

• L1 - Cache: 16 16 KiB ( Data Instructions )
• L2 cache: 512 KiB, four external cache chips on CPU module with half the processor clock
• Slot 1, GTL with 66 MHz Front Side Bus
• Operation voltage ( Vcore ): 2.8 V
• Release Date: May 7, 1997
• Manufacturing Technology: 0.35 micron
• The size: 203 mm ² at 7.5 million transistors
• Clock frequencies: 233, 266 and 300 MHz
• TDP ( max. W): 233 MHz: 34.8
• 266 MHz: 38.2
• 300 MHz: 43

Deschutes ( A80523 )

• L1 - Cache: 16 16 KiB ( Data Instructions )
• L2 cache: 512 KiB, two external cache chips on CPU module with half the processor clock
• Side Slot 1, GTL with 66 and 100 MHz front bus
• Operation voltage ( Vcore ): 2.0 V
• Release Date: January 26, 1998
• Manufacturing Technology: 0.25 micron
• The size: 131 mm ² (later 118 mm ²) at 7.5 million transistors
• Clock frequencies 266 to 450 MHz 66 MHz FSB: 266, 300, 333 MHz TDP ( max. W): 266 MHz: 16.8
• 300 MHz: 18.6
• 333 MHz: 20.6

• TDP ( max. W): 350 MHz: 21.5
• 400 MHz: 24.3
• 450 MHz: 27.1

Mobile models

Tonga ( 80523 )

• L1 cache: 16 16 KiB ( Data Instructions )
• L2 cache: 512 KiB external L2 chips run at half the clock frequency
• Housing: MMC 1, MMC 2, Mini - Cartridge
• Front Side Bus: 66 MHz GTL
• Operation voltage ( Vcore ): 1.6 V
• Manufacturing Technology: 0.25 micron CMOS
• Release Date: June 7, 1997
• Clock frequencies: 233, 266 and 300 MHz
• TDP ( max. W): 300 MHz: 11.6
• 266 MHz: 10.3
• 233 MHz: 9.0

Dixon ( 80524 )

• L1 cache: 16 16 KiB ( Data Instructions )
• L2 cache: 256 KiB, on- the, full speed.
• Package: BGA, MMC 1, MMC 2, μPGA
• Front Side Bus: 66 MHz GTL
• Operation voltage ( Vcore ): 1.5 V, 1.55 V, 1.6 V, 2.0 V
• Manufacturing Technology: 0.25 micron CMOS
• Release Date: January 25, 1999
• Clock frequencies: 266, 300, 333, 366 and 400 MHz