Duron

  • Spitfire
  • Morgan
  • Applebred

The processor AMD Duron was a market politically settled in the low -cost segment version of the high-order Athlon.

While there were also early versions of the so-called Slot A Athlon by, the Duron was only offered as a CPGA for the Socket A.

The name Duron (derived from the Latin durus, German hard, persevering ) should allude to the durability of the product, which has up to now quite confirmed. The processor is considered as a competitor to the Celeron of the Intel company that offers its processor in the same segment.

Product history

The first Durons with the development name Spitfire and Morgan were fabricated in 0.18-micron technology and came directly from the Athlon Thunderbird or Athlon XP Palomino, but differed by the reduction of the L2 cache on only 64 KiB of these ( resulting in lower manufacturing cost was ). This first series was available for clocks to 950 ( Spitfire ) or 1.300 MHz ( Morgan ), always paired with a FSB of 100 MHz.

The later models called Applebred were manufactured in 0.13 micron and were available with 133 MHz FSB and clock frequencies up to 1,800 MHz. The technical basis here was the Athlon XP Thoroughbred A / B with physically existing 256 KiB L2 cache, but has been disabled until 64 KiB; produced in this way for the Athlon chips product line could be sold, which had errors in the area of L2 cache, so not the full 256 KiB were available. Common to all Duron is the L1 cache size of 2x64 KiB and the L2 cache size of 64 KiB on- the, while the Socket A Athlons generally with L2 cache of 256 or 512 KiB (last version of the Athlon XP were equipped with codenamed Barton ).

Some specimens (series ) of the Duron settled by gradually increasing the FSB and simple change of the multiplier (pencil trick, see the four pencil marks in the upper right corner of the image, green arrow) overclock pretty far.

Despite his well known success of Duron often seemed to be a sort AMD stepchild. After the 1300 - MHz model it took a long time before variants with 1400, 1600 and 1800 MHz bands appeared; also the low-end model was never provided with a performance rating in accordance with the Athlon XP. This meant that the Duron against Intel's Celeron CPUs with more than 2 GHz marketing technically had a hard time ( even though he was by no means inferior in this price and performance ). The thus rather modest reputation of Duron led ultimately to the fact that AMD ( probably under pressure from major manufacturers such as Lenovo and Asus ), the model 2004 completely stopped and began to populate the lower performance segment with the new Sempron processors, which technically full-fledged Athlon XP with relatively low clock rates (from 1500 MHz ) were.

Model data

Spitfire

  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 - Cache: 64 KiB with processor clock
  • MMX, Extended 3DNow!
  • Socket A, EV6 100 MHz Front Side Bus (FSB 200)
  • Operation voltage ( Vcore ): 1.50 to 1.60 V
  • First Release Date: June 19, 2000
  • Manufacturing Technology: 0.18 micron
  • The size: 100,0 mm ² at 25.0 million transistors
  • Clock speed: 600-950 MHz 600 MHz [ 19, June 2000 ]
  • 650 MHz [ 19, June 2000 ]
  • 700 MHz [ 19, June 2000 ]
  • 750 MHz [ 5 September 2000 ]
  • 800 MHz [ 17 October 2000 ]
  • 850 MHz [ 8 January 2001 ]
  • 900 MHz [ 2 April 2001 ]
  • 950 MHz [ 6 June 2001 ]

Morgan

  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 64 KiB with processor clock
  • MMX, Extended 3DNow!, SSE
  • Socket A, EV6 100 MHz Front Side Bus (FSB 200)
  • Operation voltage ( Vcore ): 1.75 V
  • First release date: August 20, 2001
  • Manufacturing Technology: 0.18 micron
  • Clock rates: 0.9-1.3 GHz
  • The size: 105.68 mm ² 25.2 million transistors 1.0 GHz [ 20, August 2001 ]
  • 1.1 GHz [ 1 October 2001 ]
  • 1.2 GHz [ 15, November 2001 ]
  • 1.3 GHz [ 21, January 2002 ]

Applebred

The Applebred core resembles a Thoroughbred-A/-B-Kern of the Athlon XP, are disabled when the parts of the L2 cache.

  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 64 KiB with processor clock
  • MMX, Extended 3DNow!, SSE
  • Socket A, Side EV6 133 MHz front bus (FSB 266)
  • Operation voltage ( Vcore ): 1.50 V
  • First release date: August 21, 2003
  • Manufacturing Technology: 0.13 micron
  • The size: 80.89 mm ², 84.66 or 86.97 mm ² mm ² 37.2 million transistors
  • Clock rates: 1.4-1.8 GHz 1.4 GHz [ 21, August 2003 ]
  • 1.6 GHz [ 21, August 2003 ]
  • 1.8 GHz [ 21, August 2003 ]
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