- Socket 754
- Socket S1
Turion 64 is called a on 10 March 2005 officially presented Notebook Processor Family AMD manufacturer. As a dual -core version came in 2006, the AMD Turion 64 X2 on the market.
The Turion 64 was developed as AMD K8L and represents a particularly energy-saving variant of the K8 generation dar. Nevertheless, he has all the other features of this generation.
- 5.1 Richmond
The Turion 64 is a direct derivative of the desktop processor Athlon 64 for Socket 754 Single-channel DDR memory interface and the socket S1 with dual- channel DDR2 memory interface. The Turion 64 is optimized with slight changes in the manufacturing process at low power consumption. Through the relationship with the Athlon 64 memory controller in the CPU die is also the Turion 64 integrated and communication accounts for over Northbridge.
- High-speed communication with the reservoir by eliminating bottlenecks
- Overall lower power consumption than with external Northbridge
- The type of memory used is directly dependent on the CPU. The Turion 64 Lancaster - core example, can respond only DDR memory, the Turion 64 with Richmond - core is able to speak to DDR2 memory.
- As a power-saving measure, the HyperTransport communication is cut off in the C3 low-power mode. When using shared memory graphics cards but the GPU constantly engages to the main memory. This would then no longer available. In order for the graphics card, the image several times per second and can read the power saving features can still be used, the chipset must support the so-called stutter -mode to enable the hardware access to the main memory without CPU.
The designation scheme used is based primarily on maximum power consumption and the processing power: The abbreviation MT denotes the low- voltage version with a maximum of 25 watts of power (TDP ), ML the standard version with a maximum of 35 W. This is followed by a two digit number, the comparability of the to ensure the performance of the model variants. Also the Turion 64 is - as others AMD64 CPUs before - available with different L2 cache sizes. The L2 cache sizes vary 512-1024 KiB, where the high-order models have a larger L2 cache.
On 1 September 2006 a new model, codenamed " Richmond " was put on the market that uses the socket S1. It therefore features a DDR2 memory interface and now dominates the virtualization technology AMD -V.
AMD officially positioned as Turion 64 Mobile Technology designated marketing concept to that of the Intel Centrino. Unlike Intel, AMD does not bind the use of the brand name but to the use of certain, mainly in-house chipsets, but leaves the manufacturer the choice of components. ATI Technologies, VIA Technologies, SiS, and offer notebook chipsets for the Turion 64 to:
- ATI Xpress
- VIA K8M series
- VIA K8T series
Model data base 754
All processors for socket 754 have a memory controller having a channel (64-bit, single - channel operation) for DDR SDRAM.
- Revision E5
- L1 - Cache: 64 64 KiB ( Data Instructions )
- L2 cache: 512 KiB or 1024 KiB with processor clock
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit
- Socket 754, 800 MHz HyperTransport ( HT1600 )
- Operation voltage ( Vcore ): 0.9 to 1.35 V ( ML series)
- 0.9-1.2 V (MT series)
- ML models ( Turion Desktop Replacement ): ML -28: 1.6 GHz (512 KiB L2 cache 32 F TDP) [ 22 June 2005 ]
- ML -30 1.6 GHz (1024 KiB L2 cache, 32W TDP) [ 10 March 2005 ]
- ML -32: 1.8 GHz (512 KiB L2 cache 34 F TDP) [ 10 March 2005 ]
- ML -34: 1.8 GHz (1024 KiB L2 cache 34 F TDP) [ 10 March 2005 ]
- ML -37: 2.0 GHz (1024 KiB L2 cache, 35W TDP) [ 10 March 2005 ]
- ML -40: 2.2 GHz (1024 KiB L2 cache 35 W TDP) [ 22 June 2005 ]
- ML- 42: 2.4 GHz ( 512 KiB L2 cache, 35W TDP) [ 1 October 2005 ]
- ML -44: 2.4GHz (1024 KiB L2 cache, 35W TDP) [ 4 January 2006 ]
- MT -28: 1.6 GHz (512 KiB L2 cache 22 F TDP) [ 22 June 2005 ]
- MT -30: 1,6 GHz (1024 KiB L2 cache, 22W TDP) [ 10 March 2005 ]
- MT -32: 1.8 GHz ( 512 KiB L2 cache, 24W TDP) [ 10 March 2005 ]
- MT -34: 1.8 GHz (1024 KiB L2 cache 24 F TDP) [ 10 March 2005 ]
- MT- 37: 2.0 GHz (1024 KiB L2 cache 25 W TDP) [ 22 August 2005 ]
- MT -40: 2.2 GHz (1024 KiB L2 cache 25 W TDP) [ 22 August 2005 ]
Model data base S1
All processors for socket S1 have a memory controller with two channels (128-bit, dual- channel operation) for DDR2 SDRAM.
- Revision F2
- L1 - Cache: 64 64 KiB ( Data Instructions )
- L2 cache: 512 KiB with processor clock
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V
- Socket S1, HyperTransport (800 MHz, HT1600 )
- Operation voltage ( Vcore ): 1:00 to 1:45 V
- Release Date: 1 September 2006
- Manufacturing Technology: 90 nm ( SOI)
- Clock rates: 2.0-2.2 GHz MK models: MK -36: 2.0 GHz ( 512 KiB L2 cache, 31W TDP) [ 1 September 2006 ]
- MK- 38: 2.2 GHz (512 KiB L2 cache, 31W TDP) [ 1 September 2006 ]