Athlon 64

  • Socket 754
  • Socket 939
  • Socket AM2
  • ASB1
  • Clawhammer
  • Newcastle
  • Winchester
  • Venice (Manchester)
  • San Diego ( Toledo)
  • Orleans (Windsor )
  • Lima (Brisbane )
  • Huron

The AMD Athlon 64 is a microprocessor for computers and the second representative of the AMD K8 generation. He was put on the market in 2003 and owns the AMD64 microarchitecture.

The Athlon 64 is the successor of the AMD Athlon XP. In addition to the desktop version, there are models for Notebooks ( Mobile Athlon 64 and Turion 64 Mobile Technology ), for low cost systems ( Sempron ) and for the high- end market (AMD Athlon 64 FX). In 2007 also models that dispense with the " 64 " in the name came from. AMD Athlon K8 on - base is in the use of language sometimes also referred to as Athlon LE or Athlon 64 LE, to distinguish it from the AMD Athlon K7 - on base, but these names do not correspond to the official designation. The Athlon 64 is generally not suitable for multiprocessor systems that ensure appropriate variant of the Athlon 64 family is marketed under the name AMD Opteron. However, it was brought to market with the AMD Athlon 64 X2 CPU, two CPU cores has ( dual-core ) and therefore behaves similarly to a dual- CPU system.

  • 2.1 Clawhammer
  • 2.2 Newcastle
  • 2.3 Venice
  • 3.1 Clawhammer
  • 3.2 Newcastle
  • 3.3 Winchester
  • 3.4 Venice
  • 3.5 San Diego
  • 3.6 Manchester with a disabled core
  • 3.7 Toledo with a disabled core
  • 4.1 Energy classes
  • 4.2 Orleans
  • 4.3 Windsor
  • 4.4 Lima
  • 5.1 Huron

Development

Initially, AMD apparently had manufacturing problems with the Athlon 64 and could not overclock the models overestimated. The cause was suspected in parasitic capacitances in the otherwise especially at part load very energy-saving SOI process. The launch was delayed considerably, and it was about a year behind the original schedule. For this reason, it was initially unclear whether AMD would have success with the Athlon 64 and can compete with Intel's Pentium 4. By improving the production and newer steppings of the Athlon 64, the problems could be resolved.

The Athlon 64 has the Athlon XP completely replaced: AMD offers models with a work based on the old Quantispeed rating model rating from 2800 to 4000 and thus covered the entire market. For the budget range of the AMD Sempron is designed. In 2007, the rating for new processors was dropped again, and the " 64 " in the name was thought to be superfluous, since now all x86 processors were 64- bit capable. Newer models one finds therefore under the name Athlon, the model number is appended. The model number consists of two letters followed by a dash and a four-digit number (eg LE -1620 ). The first letter stands for the power class, L is the subclass. The second letter identifies the approximate power dissipation, E in this context means less than 65 W TDP. In the four-digit number is the first digit for the type family, the other three digits arrange the processor within this type of family.

Processor Socket

Socket 754 The Athlon 64 for Socket 754 has only a single- channel memory interface and comes with 754 pins and four-layer motherboards from. This base served as the first platform for the Athlon 64, but was then replaced by Socket 939.

The Socket 754 was used until mid- 2006 as a platform for the AMD Sempron and notebook processors for Mobile Athlon 64, Turion 64, and Sempron Mobile.

Socket 939 The Socket 939 offers the Athlon 64 a dual- channel memory interface. And because of the doubled memory bandwidth have the Socket 939 CPUs have a higher performance than the base 754 models. AMD is therefore to a different performance rating to justice to this circumstance; so have Athlon 64 for Socket 939 at the same clock speed, and L2 cache a higher rating than the base 754 in mid-2006, he was replaced by the Socket AM2.

Socket 940 The only really intended for the AMD Opteron Socket 940 was initially used as a platform for the Athlon 64 FX, which was just a renamed Opteron in principle. This was unnecessary but after a short time for the desktop market, because the AMD Athlon 64 FX for the socket 939 and AM2 designed.

Socket AM2 About the Socket AM2 Athlon 64 DDR2 SDRAM binds to continue two memory channels. In addition, support the processors for this socket virtualization technology AMD -V. For marketing reasons, the focus is increasingly on dual-core processors, which led to the cessation of production in the Athlon 64 series in 2007; Single -core models for Socket AM2 will continue to be produced only within the Athlon series ( without " 64").

Ball Grid Array ASB1 The ASB1 package is a scaled-down ball grid array (BGA ) specifically for the Athlon Neo (Huron - core ) to save space to solder it into sub-notebooks or netbooks. The BGA occupies an area of ​​27 mm on a 27 mm with a profile height of 2.5 mm.

Processor cores

There are several processor cores for the Athlon 64, which carry the name Clawhammer, Newcastle, Winchester, Venice, San Diego and Orleans.

The Clawhammer is the oldest core, its revision C0 in 130 - nm technology formed the basis for the first Athlon 64 with 1 MiB L2 cache, which were delivered from mid-2003. The integrated memory controller of the revision C0 can for large memory configurations (especially with three or more double-sided modules ) to RAM does not overclock high. With three PC3200 memory modules, each with 512 MiB maximum of 166 MHz instead of 200 MHz are possible, with three 1 GiB modules, the controller must even turn down to 100 MHz memory clock, otherwise no reliable signal transmission must be guaranteed.

The newer revision CG offered in addition to improved thermal design and enhanced power management minor improvements on the memory controller and the new option " 2T Command Rate " on, by which the maximum memory speed could be increased for large configurations. Here, a memory request is not signaled as usual for one bar on the processor pins, but two bars long persevered, so that even at high clocking a reliable signal detection. This security is bought by a loss of transmission bandwidth. Whether the 2T overhead can be outweighed by the higher memory clock, must be determined in each individual case. Enable Some BIOS versions 2T by default in any case and so also slow "fast" memory configurations unnecessarily by up to 15 % off.

The name Newcastle first appeared in connection with Clawhammer processors, in which one half of the L2 cache was disabled and walked to compensate with more clock to nominally to provide the same performance. Later there was "real" Newcastle CPUs that physically actually only had 512 KiB cache.

After that, AMD introduced the Winchester ( revision D0), which represents the migration to 90nm production. Due to the smaller linewidths higher clock rates were possible with less power consumption. Due to the 90 - nm process, the power dissipation of the Winchester core decreased by up to 20 % compared to the Newcastle core, thus Alike efficient cooling was possible. Again, the memory controller has been improved.

Relatively shortly after the Winchester but already followed the next kernel called Venice (Revision E3, 512 KiB L2 cache ), the first SSE3 supported and was also manufactured in 90 nm. In these processors AMD integrated for the first time, developed jointly with IBM, " Dual Stress Liner " technology in the manufacturing process. Through an elongated crystal lattice, the transistors can switch up to 24 % faster in the chip at a constant power dissipation. In practice, AMD expects increased by 16% clock potential, which would amount to up to 2800 MHz core clock. The memory controller of the revision E3 has been improved again. Extensive memory configurations must be slowed down only with 2T Command Rate if four double-sided DIMMs are used to be run with DDR -400. All other configurations can be operated at maximum speed. The memory transfer performance is enhanced by a doubled number of write- combine buffer, and the performance in conjunction with UMA graphics cards has increased. In addition, the Venice supports new values ​​for the memory divider. This makes it possible to use also (not specified JEDEC ) DDR -500 memory modules, if the BIOS supports the new memory dividers. The performance gain by this increase in the memory bandwidth, however, moves only in the low single-digit percentage range. Shortly after the launch of the Venice- E3 steppings three errors were discovered in the processors. Thus, the new write -Combine Buffer proved impractical and had to be switched off when the system boots from the BIOS. If that did not happen, the system could freeze to an unforeseeable time. AMD therefore laid the Venice processor a short time later in the corrected version of E6 scratch.

For the first time from Venice again a variant with 1024 KiB L2 cache, under the name of San Diego ( E4) is running. From the Venice- problems, these CPUs are basically not affected.

The core Orleans is also manufactured in 90 nm, but supports DDR2 memory and AMD-V virtualization technology. Ensure that the new skills can be used, the new core has the new socket AM2.

The newer Lima core is identical to the Orleans, but it is made in 65 nm, whereby the power loss is reduced.

With the core of Windsor, the first processors of the K8 generation have been presented, published again under the AMD Athlon pure label. Internally, it is actually a dual-core, although one these two is off. By this measure, AMD will both increase the yield, as well as processors can be sold, in which a core is not working correctly. In addition, it can also be the maximum power dissipation at the level of 45 watts are held, although these processors were not created in a 90 - nm technology.

The Huron - core is designed to be a single-core processor, built in ultra-mobile computers, such as larger netbooks. It is manufactured in 65 - nm technology and has a TDP of 15 watts. First copies came into circulation in January 2009. It is sold in mini-notebook with a built- in M690T chipset graphics unit as Yukon platform. AMD also announced a dual-core variant of the Congo platform.

Model data base 754

All processors for socket 754 have a memory controller having a channel (64-bit, single - channel operation) for DDR SDRAM.

Clawhammer

  • Revisions: C0, CG
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 1024 KiB with processor clock (special version with 512 KiB, rest disabled)
  • MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit
  • Socket 754, 800 MHz HyperTransport (HT 1600)
  • Manufacturing Technology: 130 nm ( SOI)
  • The size: 193 mm ² at 105.9 million transistors
  • Clock frequencies: 1.8-2.4 GHz
  • Model: Athlon 64 2800 to 3700

Newcastle

  • Revision: CG
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit
  • Socket 754, 800 MHz HyperTransport (HT 1600)
  • Manufacturing Technology: 130 nm ( SOI)
  • The size: 144 mm ² 68.5 million transistors
  • Clock frequencies: 1.8-2.4 GHz
  • Model: Athlon 64 2800 to 3400

Venice

  • Revisions: E3, E6
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
  • Socket 754, 800 MHz HyperTransport (HT 1600)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 83.5 mm ² 68.5 million transistors
  • Clock frequencies: 1.8-2.4 GHz
  • Model: Athlon 64 3000 to 3400

Model data base 939

All processors for socket 939 have a memory controller with two channels (128-bit, dual- channel operation) for DDR SDRAM.

Clawhammer

  • Revision: CG
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 1024 KiB with processor clock (special versions with 512 KiB, rest disabled)
  • MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 130 nm ( SOI)
  • The size: 193 mm ² at 105.9 million transistors
  • Clock frequencies: 2.2-2.4 GHz
  • Model: Athlon 64 3500 and 4000

Newcastle

  • Revision: CG
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 130 nm ( SOI)
  • The size: 144 mm ² 68.5 million transistors
  • Clock frequencies: 1.8-2.4 GHz
  • Model: Athlon 64 3000 to 3800

Winchester

  • Revision: D0
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 84 mm ² 68.5 million transistors
  • Clock frequencies: 1.8-2.2 GHz
  • Model: Athlon 64 3000 to 3500

Venice

  • Revisions: E3, E6
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 83.5 mm ² 68.5 million transistors
  • Clock frequencies: 1.0-2.4 GHz
  • Model: Athlon 64 1500 to 3800

San Diego

  • Revision: E4
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 1024 KiB with processor clock (special version with 512 KiB, rest disabled)
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
  • Socket 939, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 115 mm ² at 114 million transistors
  • Clock frequencies: 2.2-2.4 GHz
  • Model: Athlon 64 3500 to 4000

Manchester with a disabled core

  • Arising out of an Athlon 64 X2 dual- core processor by disabling one core
  • Revision: E4
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, NX bit, AMD64, Cool'n'Quiet and.
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 147 mm ² with 154 million transistors
  • Model: Athlon 64 3200 and 3500

Toledo with a disabled core

  • Arising out of an Athlon 64 X2 dual- core processor by disabling one core
  • Revision: E6
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 1024 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, NX bit, AMD64, Cool'n'Quiet and.
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 199 mm ² at 233.2 million transistors
  • Model: Athlon 64 3700 and 4000

Model data socket AM2

All processors for Socket AM2 have a memory controller with two channels (128-bit, dual- channel operation) for DDR2 SDRAM.

Energy classes

The AMD Athlon 64 is manufactured in different power classes. A distinction between the models is possible only on the basis of OPN. This number is located on the processor housing under the processor name.

Abbreviations

  • EE: Energy Efficient means that the CPU compared consumes less power, the power loss is less.
  • SFF Small Form Factor means that the power loss compared to EE was again significantly reduced. The CPU needed by a less complex cooling and is thus suitable for small computer case.

Orleans

  • Native single cores possible, possibly even Athlon 64 X2 Dual Cores "Windsor" with a disabled core
  • Revision: F2
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit, AMD-V
  • Socket AM2, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 103 mm ² 81.1 million transistors
  • Clock frequencies: 1.8-2.6 GHz
  • Model: Athlon 64 3000 to 4000

Windsor

  • Athlon 64 X2 dual- core processor with one core disabled
  • Revision: F3
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 1024 KiB with processor clock ( also versions with 512 KiB, rest disabled)
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit, AMD-V
  • Socket AM2, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 90 nm ( SOI)
  • The size: 230 mm ² at 227.4 million transistors
  • Clock frequencies: 2.2 to 3.2 GHz
  • Models: Athlon64 X2 3500 to 6400 ; Athlon LE- 1600 and LE -1640

Lima

  • Native single cores possible, possibly even Athlon 64 X2 Dual Cores " Brisbane " with a disabled core
  • Revisions: G1, G2
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit, AMD -V, Presidio
  • Socket AM2, HyperTransport with 1000 MHz ( HT 2000)
  • Manufacturing Technology: 65 nm ( SOI)
  • The size: 77.2 mm ² at 122 million transistors
  • Clock frequencies: 1.0-2.8 GHz
  • Model: Athlon 64 2000 to 3800 ; Athlon LE- 1640 and LE -1660

Model data ASB1

Huron

  • Revisions: G2
  • L1 - Cache: 64 64 KiB ( Data Instructions )
  • L2 cache: 512 KiB, with processor clock
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit, AMD-V
  • ASB1 package ( Ball Grid Array) with 800 MHz HyperTransport ( HT1600 )
  • Manufacturing Technology: 65 nm ( SOI)
  • Clock frequencies: 1.6 GHz
  • Models: AMD Athlon Neo MV-40
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